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| Manish Shah, Robert Golla, Gregory Grohoski, Paul Jordan, Jama Barreh, Jeff Brooks, Mark Greenberg, Gideon Levinsky, Mark Luttrell, Christopher Olson, Zeid Samoail, Matt Smittle, Tom Ziaja, "Sparc T4: A Dynamically Threaded Server-on-a-Chip," IEEE Micro, vol. 32, no. 2, pp. 8-19, March/April, 2012. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.2012.1, author = {Manish Shah and Robert Golla and Gregory Grohoski and Paul Jordan and Jama Barreh and Jeff Brooks and Mark Greenberg and Gideon Levinsky and Mark Luttrell and Christopher Olson and Zeid Samoail and Matt Smittle and Tom Ziaja}, title = {Sparc T4: A Dynamically Threaded Server-on-a-Chip}, journal ={IEEE Micro}, volume = {32}, number = {2}, issn = {0272-1732}, year = {2012}, pages = {8-19}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2012.1}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Sparc T4: A Dynamically Threaded Server-on-a-Chip IS - 2 SN - 0272-1732 SP8 EP19 EPD - 8-19 A1 - Manish Shah, A1 - Robert Golla, A1 - Gregory Grohoski, A1 - Paul Jordan, A1 - Jama Barreh, A1 - Jeff Brooks, A1 - Mark Greenberg, A1 - Gideon Levinsky, A1 - Mark Luttrell, A1 - Christopher Olson, A1 - Zeid Samoail, A1 - Matt Smittle, A1 - Tom Ziaja, PY - 2012 KW - Microprocessors KW - computer architecture KW - multithreaded processors KW - processor architectures KW - pipeline processors KW - computer systems organization KW - support for security KW - microarchitecture implementation considerations KW - multicore/single-chip multiprocessors KW - parallel architectures KW - support for multithreaded execution VL - 32 JA - IEEE Micro ER - | |||
The Sparc T4 is the next generation of Oracle's multicore, multithreaded 64-bit Sparc server processor. It delivers significant performance improvements over its predecessor, the Sparc T3 processor. The authors describe Sparc T4's key features and detail the microarchitecture of the dynamically threaded S3 processor core, which is implemented on Sparc T4.
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