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Issue No.04 - July/August (2011 vol.31)
pp: 63-75
Ayse K. Coskun , Boston University
Jie Meng , Boston University
David Atienza , Ecole Polytechnique Federale de Lausanne
Mohamed M. Sabry , Ecole Polytechnique Federale de Lausanne
ABSTRACT
<p>This article explores the benefits and the challenges of 3D design and discusses novel techniques to integrate predictive cooling control with chip-level thermal-management methods such as job scheduling and voltage frequency scaling. Using 3D liquid-cooled systems with intelligent runtime management provides an energy-efficient solution for designing single-chip many-core architectures.</p>
INDEX TERMS
multiprocessor systems, emerging technologies, energy-aware systems, temperature-aware design, active cooling, 3D liquid-cooled systems
CITATION
Ayse K. Coskun, Jie Meng, David Atienza, Mohamed M. Sabry, "Attaining Single-Chip, High-Performance Computing through 3D Systems with Active Cooling", IEEE Micro, vol.31, no. 4, pp. 63-75, July/August 2011, doi:10.1109/MM.2011.39
REFERENCES
1. J. Howard et al., "A 48-Core IA-32 Message-Passing Processor with DVFS in 45 nm CMOS," Proc. IEEE Int'l Solid-State Circuits Conf., 2010, IEEE Press, pp. 108-109.
2. S. Reda, G. Smith, and L. Smith, "Maximizing the Functional Yield of Wafer-to-Wafer 3D Integration," IEEE Trans. Very Large Scale Integration Systems, vol. 17, no. 9, 2009, pp. 1357-1362.
3. A.K. Coskun, A.B. Kahng, and T. Rosing, "Temperature- and Cost-Aware Design of 3D Multiprocessor Architectures," Proc. 12th Euromicro Conf. Digital System Design, Architectures, Methods, and Tools, IEEE CS Press, 2009, pp. 183-190.
4. G.H. Loh and Y. Xie, "3D Stacked Microprocessor: Are We There Yet?" IEEE Micro, vol. 30, no. 3, 2010, pp. 60-64.
5. M. Healy et al., "Multiobjective Microarchitectural Floorplanning for 2D and 3D ICs," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 26, no. 1, 2007, pp. 38-52.
6. C. Zhu et al., "Three-Dimensional Chip-Multiprocessor Runtime Thermal Management," IEEE Trans. Computer-Aided Design of Integrated Circuits and Systems, vol. 27, no. 8, 2008, pp. 1479-1492.
7. T. Brunschwiler et al., "Interlayer Cooling Potential in Vertically Integrated Packages," Microsystem Technologies, vol. 15, no. 1, 2008, pp. 57-74.
8. T. Brunschwiler et al., "Validation of the Porous-Medium Approach to Model Interlayer-Cooled 3D-Chip Stacks," Proc. IEEE Int'l Conf. 3D System Integration, IEEE CS Press, 2009, pp. 1-10.
9. X. Dong and Y. Xie, "System-Level Cost Analysis and Design Exploration for Three-Dimensional Integrated Circuits (3D ICs)," Proc. Asia and South Pacific Design Automation Conference, IEEE Press, 2009, pp. 234-241.
10. E.G. Colgan et al., "A Practical Implementation of Silicon Microchannel Coolers for High Power Chips," IEEE Trans. Components and Packaging Technologies, vol. 30, no. 2, 2007, pp. 218-225.
11. K. Skadron et al., "Temperature-Aware Microarchitecture," Proc. 30th Ann. Int'l Symp. Computer Architecture, ACM Press, 2003, pp. 2-13.
12. A.K. Coskun et al., "Energy-Efficient Variable-Flow Liquid Cooling in 3D Stacked Architectures," Proc. Design Automation and Test in Europe, IEEE Press, 2010, pp. 111-116.
13. C. Bienia, "Benchmarking Modern Multiprocessors," doctoral dissertation, Computer Science Dept., Princeton University, 2011.
14. D. Bailey et al., The NAS Parallel Benchmarks, tech. report RNR-94-007, NASA Ames Research Center, 1994.
15. N.L. Binkert et al., "The M5 Simulator: Modeling Networked Systems," IEEE Micro, July/Aug. 2006, pp. 52-60.
16. S. Li et al., "McPAT: An Integrated Power, Area, and Timing Modeling Framework for Multicore and Many-Core Architectures," Proc. 42nd Ann. IEEE/ACM Int'l Symp. Microarchitecture, ACM Press, 2009, pp. 469-480.
17. S. Heo, K. Barr, and K. Asanovic, "Reducing Power Density through Activity Migration," Proc. Int'l Symp. Low-Power Electronics and Design, ACM Press, 2003, pp. 217-222.
18. D.B. Tuckerman and R.F.W. Pease, "High-Performance Heat Sinking for VLSI," IEEE Electron Device Letters, vol. 2, no. 5, 1981, pp. 126-129.
19. T. Brunschwiler et al., "Direct Liquid-Jet Impingement Cooling with Micron-Sized Nozzle Array and Distributed Return Architecture," Proc. 10th Intersociety Conf. Thermal and Thermomechanical Phenomena in Electronics Systems, IEEE Press, 2006, pp. 196-203.
20. A. Sridhar et al., "3D-ICE: Fast Compact Transient Thermal Modeling for 3D-ICs with Intertier Liquid Cooling," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, IEEE Press, 2010, pp. 463-470.
21. M. Sabry, A.K. Coskun, and D. Atienza, "Fuzzy Control for Enforcing Energy Efficiency in High-Performance 3D Systems," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, IEEE Press, 2010, pp. 642-648.
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