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Issue No.04 - July/August (2011 vol.31)
pp: 42-50
Junli Gu , Tsinghua University
Yihe Sun , Tsinghua University
Steven S. Lumetta , University of Illinois at Urbana-Champaign
Rakeshh Kumar , University of Illinois at Urbana-Champaign
ABSTRACT
<p>The Message Orchestration and Performance Enhancement Device (MOPED) provides an explicit hardware communication mechanism that offloads synchronization and data communication from CPUs to enable overlap between computation and communication, while also transferring data efficiently. The device achieves significant improvement in performance of real applications and reduction of on-chip cache misses, off-chip memory misses, and application execution time.</p>
INDEX TERMS
Multicore architecture, cache hierarchy, data communication
CITATION
Junli Gu, Yihe Sun, Steven S. Lumetta, Rakeshh Kumar, "MOPED: Accelerating Data Communication on Future CMPs", IEEE Micro, vol.31, no. 4, pp. 42-50, July/August 2011, doi:10.1109/MM.2011.63
REFERENCES
1. N. Chatterjee et al., "Optimizing a Multicore Processor for Message-Passing Workloads," Proc. Workshop Unique Chips and Systems (UCAS-5), 2009, pp. 61-68.
2. J. Gu et al., "MOPED: Orchestrating Interprocess Message Data on CMPS," Proc. 17th IEEE Int'l Symp. High-Performance Computer Architecture, IEEE CS Press, 2011, pp. 111-120.
3. R. Kumar et al., Multiprocessor System-on-Chip: Hardware Design and Tool Integration, Springer-Verlag, 2010, pp. 115-123.
4. H. Howard and S. Dighe, "A 48-Core IA-32 Message-Passing Processor with DVFs in 45nm CMOS," Proc. IEEE Int'l Solid-State Circuits Conf. Digest of Technical Papers, IEEE Press, 2010, pp. 108-109.
5. J. Gu et al., "Accelerating Data Movement on Future Chip Multiprocessors," Proc. 2nd Int'l Forum Next-Generation Multicore/Many-Core Technologies, ACM Press, 2010, doi:10.1145/1882453.1882457.
6. D. Buntinas, G. Mercier, and W. Gropp, "Data Transfers between Processes in an SMP System: Performance Study and Application to MPI," Proc. Int'l Conf. Parallel Processing, IEEE CS Press, 2006, pp. 487-496.
7. M.M.K. Martin et al., "Multifacet's General Execution-Driven Multiprocessor Simulator (GEMS) Toolset," ACM SIGARCH Computer Architecture News, vol. 33, no. 4, 2005, pp. 92-99.
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