Issue No.02 - March/April (2011 vol.31)
Published by the IEEE Computer Society
Jose Renau , University of California, Santa Cruz
Will Eatherton , Juniper Networks
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2011.27
<p>This introduction to the special issue on Hot Chips 22 briefly discusses the conference and introduces the articles selected for publication.</p>
Hot Chips is a leading forum to present new processor architectures and important trends in system enabling aspects of silicon around areas such as software, I/O, and packaging. Hot Chips 22 included tutorials on nonvolatile memory and optical interconnects, which are hot topics in current chips.
The 22nd annual Hot Chips conference, held at Stanford University, featured 23 papers for talks. The conference doesn't include typical proceedings, just an abstract and a presentation. Only the best papers are invited to submit an article for publication in this special issue of IEEE Micro.
New processor architectures
The last Hot Chips session usually includes some of the most interesting talks. This year it was reserved for the new processor architectures presented by Advanced Micro Devices and IBM. AMD introduced its two latest processors, Bulldozer and Bobcat. In "Bulldozer: An Approach to Multithreaded Compute Performance," Michael Butler et al. describe Bulldozer's new approach to multithreaded compute performance for maximum efficiency and throughput. "Bobcat: AMD's Low-Power x86 Processor" by Brad Burgess et al. details Bobcat's small, strong, and efficient x86 core. "The zEnterprise 196 System and Microprocessor" by Brian W. Curran et al. introduces the latest next-generation Z microprocessor, presenting the latest advances in mainframes showing a quad core reaching 5.2 GHz.
HPC requires interesting and hot chips. This year, we selected "Beyond Traditional Microprocessors for Geoscience High-Performance Computing Applications" by Olav Lindtjorn et al. to present alternative designs to continue improving HPC. "Fermi GF100 GPU Architecture" by Craig M. Wittenbrink et al. provides details about Nvidia's GPU architecture for compute, tessellation, physics, and computational graphics. This chip is powering the Top500 supercomputer. IBM is another company with many systems in the Top500. We selected two IBM talks for this special issue. In "Introducing the Adaptive Energy Management Features of the Power7 Chip," Michael Floyd et al. explain the IBM Power7 chip's adaptive energy management features. In "IBM Power Edge of Network Processor: A Wire-Speed System on a Chip," Jeffrey D. Brown et al. introduce a novel system with 16 Power cores with 64 threads per core.
Systems on chips
Hot Chips tends to have many papers from industry, but it also includes papers of pure academic projects. This year, we selected "The GreenDroid Mobile Application Processor: An Architecture for Silicon's Dark Future" by Nathan Goulding-Hotta et al., which discusses GreenDroid, a mobile application processor for a future of dark silicon.
Although we could only include a few articles in the special issue, you can access the full set of presentation slides for Hot Chips 22 online at http://www.hotchips.org/conference-archives/hot-chips-22. We hope you enjoy this special issue.
Jose Renau is an assistant professor in the Computer Engineering Department at the University of California, Santa Cruz. He's also the project leader of the MASC (Micro Architecture at Santa Cruz) group. His research interests include computer architecture complexity, temperature, and reliability; FPGAs; and ASICs. Renau has a PhD in computer science from the University of Illinois at Urbana Champaign. He's a member of IEEE and the ACM.
Will Eatherton is a vice president of engineering at Juniper Networks, leading product lines in IP core as well as optical. He led architecture for two generations of Cisco System Network processing chipsets, including the Quantum Flow Processor. His research interests include scalable distributed systems software, VLSI, and optical technologies. Eatherton has an MS in electrical engineering from Washington University in St. Louis.