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ReMAP: A Reconfigurable Architecture for Chip Multiprocessors
January/February 2011 (vol. 31 no. 1)
pp. 65-77
Matthew A. Watkins, Harvey Mudd College
David H. Albonesi, Cornell University

ReMAP is a reconfigurable architecture for accelerating and parallelizing applications within a heterogeneous chip multiprocessor (CMP). Clusters of cores share a common reconfigurable fabric adaptable for individual thread computation or fine-grained communication with integrated computation. ReMAP demonstrates significantly higher performance and energy efficiency than hard-wired communication-only mechanisms, and over allocating the fabric area to additional or more powerful cores.

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Index Terms:
ReMAP, chip multiprocessors, specialized programmable logic, reconfigurable architecture, fine-grained communication
Citation:
Matthew A. Watkins, David H. Albonesi, "ReMAP: A Reconfigurable Architecture for Chip Multiprocessors," IEEE Micro, vol. 31, no. 1, pp. 65-77, Jan.-Feb. 2011, doi:10.1109/MM.2011.14
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