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IEEE Micro
November/December 2010 (vol. 30 no. 6)
ISSN: 0272-1732
Table of Contents
Call for Papers
Masthead
From the Editor in Chief
David H. Albonesi, albonesi@csl.cornell.edu
pp. 4-5
Micro Economics
Shane Greenstein, greenstein@kellogg.northwestern.edu
pp. 6-8
Chip Design
Ofer Shacham, Stanford University
Omid Azizi, Stanford University
Megan Wachs, Stanford University
Wajahat Qadeer, Stanford University
Zain Asgar, Stanford University
Kyle Keley, Stanford University
John P. Stevenson, Stanford University
Stephen Richardson, Stanford University
Mark Horowitz, Stanford University
Benjamin Lee, Duke University
Alex Solomatnikov, Hicamp Systems
Amin Firoozshahian, Hicamp Systems
pp. 9-24
Throughput Computing
Christopher Hughes, Intel, Santa Clara
Changkyu Kim, Intel, Santa Clara
Yen-Kuang Chen, Intel Corporation , Santa Clara
pp. 25-35
Chip Multiprocessors
Amin Ansari, University of Michigan, Ann Arbor
Shuguang Feng, University of Michigan, Ann Arbor
Shantanu Gupta, University of Michigan, Ann Arbor
Scott Mahlke, University of Michigan, Ann Arbor
pp. 36-45
Architectural Simulation
Frederick Ryckbosch, Ghent University, Gent
Stijn Polfliet, Ghent University, Gent
Lieven Eeckhout, Ghent University, Gent
pp. 46-56
Benchmarking
Luk Van Ertvelde, Ghent University, Ghent
Lieven Eeckhout, Ghent University, Gent
pp. 57-65
Multiprocessor Systems on Chip
Roberto Airoldi, Tampere University of Technology, Tampere
Omer Anjum, Tampere University of Technology, Tampere
Fabio Garzia, Tampere University of Technology, Tampere
Alexander Wyglinski, Worcester Polytechnic Institute,
Jari Nurmi, Tampere University of Technology, Tampere
pp. 66-76
Micro Review
Being Geek (Abstract)
Richard Mateosian, xrm@pacbell.net
pp. 78
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