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| Koen Bertels, Vlad-Mihai Sima, Yana Yankova, Georgi Kuzmanov, Wayne Luk, Gabriel Coutinho, Fabrizio Ferrandi, Christian Pilato, Marco Lattuada, Donatella Sciuto, Andrea Michelotti, "HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms," IEEE Micro, vol. 30, no. 5, pp. 88-97, September/October, 2010. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.2010.91, author = {Koen Bertels and Vlad-Mihai Sima and Yana Yankova and Georgi Kuzmanov and Wayne Luk and Gabriel Coutinho and Fabrizio Ferrandi and Christian Pilato and Marco Lattuada and Donatella Sciuto and Andrea Michelotti}, title = {HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms}, journal ={IEEE Micro}, volume = {30}, number = {5}, issn = {0272-1732}, year = {2010}, pages = {88-97}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2010.91}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - HArtes: Hardware-Software Codesign for Heterogeneous Multicore Platforms IS - 5 SN - 0272-1732 SP88 EP97 EPD - 88-97 A1 - Koen Bertels, A1 - Vlad-Mihai Sima, A1 - Yana Yankova, A1 - Georgi Kuzmanov, A1 - Wayne Luk, A1 - Gabriel Coutinho, A1 - Fabrizio Ferrandi, A1 - Christian Pilato, A1 - Marco Lattuada, A1 - Donatella Sciuto, A1 - Andrea Michelotti, PY - 2010 KW - reconfigurable hardware KW - hardware-software interface KW - compiler KW - tool chain KW - hArtes KW - heterogeneous multicore platforms VL - 30 JA - IEEE Micro ER - | |||
Developing heterogeneous multicore platforms requires choosing the best hardware configuration for mapping the application, and modifying that application so that different parts execute on the most appropriate hardware component. The hArtes toolchain provides the option of automatic or semi-automatic support for this mapping. During test and validation on several computation-intensive applications, hArtes achieved substantial speedups and drastically reduced development times.
1. S. Vassiliadis et al., "The Molen Polymorphic Processor," IEEE Trans. Computer, vol. 53, no. 11, 2004, pp. 1363-1375.
2. F. Ferrandi et al., "Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs," Proc. Int'l Embedded Systems Symp. (IESS 07), IFIP 231, Springer, 2007, pp. 179-192.
3. F. Ferrandi et al., "Performance Estimation for Task Graphs Combining Sequential Path Profiling and Control Dependence Regions," Proc. 7th ACM/IEEE Int'l Conf. Formal Methods and Models for Codesign (Memocode 09), IEEE Press, 2009, pp. 131-140.
4. W. Luk et al., "A High-Level Compilation Toolchain for Heterogeneous Systems," Proc. IEEE Int'l SoC Conf. (SOCC 09), IEEE Press, 2009, pp. 9-18.
5. Y.M. Lam et al., "Mapping and Scheduling with Task Clustering for Heterogeneous Computing Systems," Proc. Int'l Conf. Field Programmable Logic and Applications (FPL 08), IEEE Press, 2008, pp. 275-280.
6. Y.D. Yankova et al., "DWARV: DelftWorkbench Automated Reconfigurable VHDL Generator," Proc. Int'l Conf. Field Programmable Logic and Applications (FPL 07), IEEE Press, 2007, pp. 697-701.
7. V.-M. Sima and K. Bertels, "Runtime Memory Allocation in a Heterogeneous Reconfigurable Platform," Proc. Int'l Conf. Reconfigurable Computing and FPGAs, IEEE CS Press, 2009, pp. 71-76.
1. J. Eker et al, "Taming Heterogeneity: The Ptolemy Approach," Proc. IEEE, vol. 91, no. 1, 2003, pp. 127-144.