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3D Stacked Microprocessor: Are We There Yet?
May/June 2010 (vol. 30 no. 3)
pp. 60-64
Gabriel H. Loh, Georgia Institute of Technology
Yuan Xie, Pennsylvania State University

Editors' Note

We live in a 3D world. It is hard to imagine a large city, such as New York City, with only single-level structures. There would be no skyscrapers, no mixed-use, no live-work. It would be a long walk (or drive) between everything, especially between dissimilar uses—all in all, very inefficient!

Integrated circuits today are typically designed using single-level Manhattan geometries, nothing like the layout of the real city. In this prolegomenon, Gabriel Loh and Yuan Xie survey 3D integrated circuit technology, demonstrating the virtues, potentials, and challenges of applying three dimensions to future microprocessor designs and exploiting the locality and diversity of real-world Manhattan geometries.

Index Terms:
Hardware, integrated circuits, microprocessor design
Gabriel H. Loh, Yuan Xie, "3D Stacked Microprocessor: Are We There Yet?," IEEE Micro, vol. 30, no. 3, pp. 60-64, May-June 2010, doi:10.1109/MM.2010.45
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