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Phase-Change Technology and the Future of Main Memory
January/February 2010 (vol. 30 no. 1)
pp. 143-143
Benjamin C. Lee, Stanford University
Ping Zhou, University of Pittsburgh
Jun Yang, University of Pittsburgh
Youtao Zhang, University of Pittsburgh
Bo Zhao, University of Pittsburgh
Engin Ipek, University of Rochester
Onur Mutlu, Carnegie Mellon University
Doug Burger, Microsoft Research

Phase-change memory may enable continued scaling of main memories, but PCM has higher access latencies, incurs higher power costs, and wears out more quickly than DRAM. This article discusses how to mitigate these limitations through buffer sizing, row caching, write reduction, and wear leveling, to make PCM a viable DRAM alternative for scalable main memories.

Index Terms:
phase-change memory, PCM, technology scaling, memory architecture, energy efficiency, DRAM
Citation:
Benjamin C. Lee, Ping Zhou, Jun Yang, Youtao Zhang, Bo Zhao, Engin Ipek, Onur Mutlu, Doug Burger, "Phase-Change Technology and the Future of Main Memory," IEEE Micro, vol. 30, no. 1, pp. 143-143, Jan.-Feb. 2010, doi:10.1109/MM.2010.24
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