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| Thomas F. Wenisch, Michael Ferdman, Anastasia Ailamaki, Babak Falsafi, Andreas Moshovos, "Making Address-Correlated Prefetching Practical," IEEE Micro, vol. 30, no. 1, pp. 50-59, January/February, 2010. | |||
| BibTex | x | ||
| @article{ 10.1109/MM.2010.21, author = {Thomas F. Wenisch and Michael Ferdman and Anastasia Ailamaki and Babak Falsafi and Andreas Moshovos}, title = {Making Address-Correlated Prefetching Practical}, journal ={IEEE Micro}, volume = {30}, number = {1}, issn = {0272-1732}, year = {2010}, pages = {50-59}, doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2010.21}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Making Address-Correlated Prefetching Practical IS - 1 SN - 0272-1732 SP50 EP59 EPD - 50-59 A1 - Thomas F. Wenisch, A1 - Michael Ferdman, A1 - Anastasia Ailamaki, A1 - Babak Falsafi, A1 - Andreas Moshovos, PY - 2010 KW - cache memories KW - address-correlated prefetching VL - 30 JA - IEEE Micro ER - | |||
Despite a decade of research demonstrating its efficacy, address-correlated prefetching has never been implemented in a shipping processor because it requires megabytes of metadata—too large to store practically on chip. New storage-, latency-, and bandwidth-efficient mechanisms for storing metadata off chip yield a practical design that achieves 90 percent of the performance potential of idealized on-chip metadata storage.
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1. T.F. Wenisch et al., "Temporal Streams in Commercial Server Applications," IEEE Int'l Symp. Workload Characterization (IISWC 2008), IEEE CS Press, 2008, pp. 99-108.