The Community for Technology Leaders
RSS Icon
Subscribe
Issue No.06 - November/December (2009 vol.29)
pp: 28-43
Minsu Kim , Korea Advanced Institute of Science and Technology
Seungjin Lee , Korea Advanced Institute of Science and Technology
Jinwook Oh , Korea Advanced Institute of Science and Technology
Sejong Oh , Korea Advanced Institute of Science and Technology
Hoi-Jun Yoo , Korea Advanced Institute of Science and Technology
ABSTRACT
<p>A proposed object recognition processor lightens its workload by estimating global region-of-interest features. A neuro-fuzzy controller performs intelligent ROI estimation by mimicking the human visual system, then manages the processor's overall pipeline stages using workload-aware task scheduling and applied database size control. The NFC performs workload-aware dynamic power management to reduce the proposed processor's power consumption.</p>
INDEX TERMS
multicore processor, object recognition, visual perception, three-stage task pipelined architecture, neuro-fuzzy controller, workload-aware dynamic power management
CITATION
Minsu Kim, Seungjin Lee, Jinwook Oh, Sejong Oh, Hoi-Jun Yoo, "Real-Time Object Recognition with Neuro-Fuzzy Controlled Workload-Aware Task Pipelining", IEEE Micro, vol.29, no. 6, pp. 28-43, November/December 2009, doi:10.1109/MM.2009.102
REFERENCES
1. S. Kyo et al., "A 51.2 GOPS Scalable Video Recognition Processor for Intelligent Cruise Control Based on a Linear Array of 128 4-Way VLIW Processing Elements," IEEE Int'l Solid-State Circuits Conf. Digest of Technical Papers, IEEE CS Press, 2003, pp. 48-477.
2. A. Abbo et al., "XETAL-II: A 107 GOPS, 600 mW Massively Parallel Processor for Video Scene Analysis," IEEE J. Solid-State Circuits, vol. 43, no. 1, 2008, pp. 192-201.
3. D. Kim et al., "An 81.6 GOPS Object Recognition Processor Based on NoC and Visual Image Processing Memory," IEEE Custom Integrated Circuits Conf. (CICC 07), IEEE CS Press, 2007, pp. 443-446.
4. S. Kyo et al., "A Low-Cost Mixed-Mode Parallel Processor Architecture for Embedded Systems," Proc. 21st Ann. Int'l Conf. Supercomputing, ACM Press, 2007, pp. 253-262.
5. K. Kim et al., "A 125 GOPS 583 mW Network-on-Chip Based Parallel Processor with Bio-Inspired Visual Attention Engine," IEEE J. Solid-State Circuits, vol. 44, no. 1, 2009, pp. 136-147.
6. J.-Y. Kim et al., "A 201.4 GOPS 496 mW Real-Time Multi-Object Recognition Processor with Bio-Inspired Neural Perception Engine," IEEE Int'l Solid-State Circuits Conf. Digest of Technical Papers (ISSCC 09), IEEE CS Press, 2009, pp.150-151.
7. Q. Zhang et al., "SIFT Implementation and Optimization for Multi-Core Systems," IEEE Int'l Symp. Parallel and Distributed Processing (IPDPS 08), IEEE CS Press, 2008, pp. 1-8.
8. D.G. Lowe, "Distinctive Image Features from Scale-Invariant Keypoints," ACM Int'l J. Computer Vision, vol. 60, no. 2, 2004, pp. 91-110.
9. S. Lee et al., "The Brain Mimicking Visual Attention Engine: An 80x60 Digital Cellular Neural Network for Rapid Global Feature Extraction," 2008 IEEE Symp. VLSI Circuits, IEEE CS Press, 2008, pp. 26-27.
10. L. Itti et al., "A Model of Saliency-based Visual Attention for Rapid Scene Analysis," IEEE Trans. Pattern Analysis and Machine Intelligence, vol. 20, no. 11, 1998, pp. 1254-1259.
11. D. Walther et al., "Selective Visual Attention Enables Learning and Recognition of Multiple Objects in Cluttered Scenes," Computer Vision and Image Understanding, vol. 100, nos. 1-2, 2005, pp. 41-63.
12. N. Ouerhani, "Visual Attention: From Bio-Inspired Modeling to Real-Time Implementation," doctoral dissertation, Institute of Microtechnology, Univ. of Neuchatel, Switzerland, 2003.
13. M. Kim et al., "A 22.8 GOPS 2.83 mW Neuro-Fuzzy Object Detection Engine for Fast Multi-Object Recognition," 2009 IEEE Symp. VLSI Circuits, IEEE CS Press, 2009, pp. 260-261.
14. F. Rothganger et al., "3D Object Modeling and Recognition Using Local Affine-Invariant Image Descriptors and Multi-View Spatial Constraints," Int'l J. Computer Vision, vol. 66, no. 3, 2006, pp. 231-259.
15. J.-Y. Kim et al, "A 66 fps 38 mW Nearest Neighbor Matching Processor with Hierarchical VQ Algorithm for Real-Time Object Recognition," IEEE Asian Solid-State Circuits Conf. (A-SSCC 08), IEEE CS Press, 2008, pp. 177-180.
16. S.A. Nene, S.K. Nayar, and H. Murase, Columbia Object Image Library (COIL-100), tech. report CUCS-006-96, Computer Science Dept., Columbia Univ., 1996.
17. D.O. Hebb, The Organization of Behavior, John Wiley &Sons, 1949.
18. M. Keating et al., Low Power Methodology Manual for System-on-Chip Design, Springer, 2007.
19. B. Kwon et al., "Parallelization of the Scale-Invariant Keypoint Detection Algorithm for Cell Broadband Engine Architecture," Proc. 5th IEEE Consumer Comm. and Networking Conf. (CCNC 08), IEEE CS Press, 2008, pp. 1030-1034.
20. T. Ko et al., "Exploring Tradeoffs in Accuracy, Energy, and Latency of Scale Invariant Feature Transform in Wireless Camera Networks," Proc. 1st ACM/IEEE Int'l Conf. Distributed Smart Cameras (ICDSC 07), IEEE CS Press, 2007, pp. 313-320.
24 ms
(Ver 2.0)

Marketing Automation Platform Marketing Automation Tool