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Erratum (HTML)
November/December 2009 (vol. 29 no. 6)
pp. 4

10. C. Isci et al., "An Analysis of Efficient Multi-core Global Power Management Policies: Maximizing Performance for a Given Power Budget," Proc. Int'l Symp. Microarchitecture (MICRO 06), IEEE CS Press, 2006, pp. 347-358.
11. M. Qureshi and Y. Patt, "Utility-based Cache Partitioning: A Low-Overhead, High-Performance, Runtime Mechanism to Partition Shared Caches," Proc. Int'l Symp. Microarchitecture (MICRO 06), IEEE CS Press, 2006, pp. 423-432.
16. K.J. Nesbit et al., "Fair Queueing Memory Systems," Proc. Int'l Symp. Microarchitecture (MICRO 06), IEEE CS Press, 2006, pp. 208-222.

Citation:
"Erratum," IEEE Micro, vol. 29, no. 6, pp. 4, Nov.-Dec. 2009, doi:10.1109/MM.2009.97
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