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Issue No.02 - March/April (2009 vol.29)
pp: 46-53
Dan Mansur , Altera
ABSTRACT
<p>Altera's Stratix IV FPGAs and Hardcopy IV ASICs provide a 40-nm common platform that offers several innovative architectural improvements, including adaptive body bias and flexible 10-Gbps transceivers. The resulting combination of high density, high performance, low power, and lower cost allows new and more complex systems previously unattainable with FPGA-based designs.</p>
INDEX TERMS
40-nm FPGA, ASIC
CITATION
Dan Mansur, "A New 40-nm FPGA and ASIC Common Platform", IEEE Micro, vol.29, no. 2, pp. 46-53, March/April 2009, doi:10.1109/MM.2009.22
REFERENCES
1. H. Hutton et al., "Improving FPGA Performance and Area Using an Adaptive Logic Module," Proc. IEEE Int'l Conf. Field Programmable Logic and Application (FPL 04), Springer, LNCS 3202, 2004, pp. 135-144.
2. F. Fallah and M. Pedram, "Standby and Active Leakage Current Control and Minimization in CMOS VLSI Circuits," IEICE Trans. Electronics, vol. E88–C, no. 4, Apr. 2005, pp. 509-519.
3. K. Kim and Y. Kim, "Standby Power Reduction Using Optimal Supply and Body-Bias Voltage," IEICE Electronics Express, vol. 5, no. 15, 10 Aug. 2008, pp. 556-561.
4. J. Pistorius and J. Schlecher, "Equivalence Verification of FPGA and Structured ASIC Implementations," Proc. IEEE Int'l Conf. Field Programmable Logic and Applications (FPL 07), IEEE Press, 2007, pp. 423-428.
5. M. Hutton and K. Keng Chan, "A Methodology for FPGA to Structured ASIC Synthesis and Verification," Proc. Conf. Design, Automation, and Test in Europe (DATE 06), European Design and Automation Assoc., 2006, pp.64-69.
6. M. Hutton and K. Keng Chan, "A Methodology for FPGA to Structured ASIC Synthesis and Verification," Proc. Conf. Design, Automation, and Test in Europe (DATE 06), European Design and Automation Assoc., 2006, pp.64-69.
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