This Article 
 Bibliographic References 
 Add to: 
Temperature Variation Characterization and Thermal Management of Multicore Architectures
January/February 2009 (vol. 29 no. 1)
pp. 116-126
Eren Kursun, IBM Thomas J. Watson Research Center
Chen-Yong Cher, IBM Thomas J. Watson Research Center

Increased variability affects the efficiency of dynamic power and thermal management. Existing on-chip sensor infrastructure can be used to improve the inherent thermal imbalances among cores in a multicore architecture. Experimental analysis based on live measurements on a special test chip shows reduced on-chip heating with no performance loss.

1. K. Bernstein et al., "High-Performance CMOS Variability in the 65-nm Regime and Beyond," IBM J. Research and Development, vol. 50, no. 4/5, 2006, pp. 433-449.
2. J. Donald and M. Martonosi, "Power Efficiency for Variation-Tolerant Multicore Processors," Proc. 2006 Int'l Symp. Low Power Electronics and Design (ISLPED 06), ACM Press, 2006, pp. 304-309.
3. S. Ghiasi, T. Keller, and F. Rawson, "Scheduling for Heterogeneous Processors in Server Systems," Proc. 2nd Conf. Computing Frontiers (CCFP 05), ACM Press, 2005, pp. 199-210.
4. S. Gunther et al., "Managing the Impact of Increasing Microprocessor Power Consumption," Intel Technology J., vol. 5, 2001; q12001/pdfart_4.pdf.
5. X. Liang and D. Brooks, "Microarchitecture Parameter Selection to Optimize System Performance under Process Variation," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design (ICCAD 06), ACM Press, 2006, pp. 429-436.
6. D. Marculescu and E. Talpes, "Variability and Energy Awareness: A Microarchitecture-Level Perspective," Proc. 42nd Ann. Conf. Design Automation (DAC 05), ACM Press, 2005, pp. 11-16.
7. M. Gomaa, M.D. Powell, and T.N. Vijaykumar, "Heat and Run: Leveraging SMT and CMP to Manage Power Density through the Operating System," ACM SIGOPS Operating Systems Rev., vol. 38, no. 5 (ASPLOS 04), 2004, pp. 260-270.
8. E. Humenay, D. Tarjan, and K. Skadron, "Impact of Process Variation on Multicore Performance Symmetry," Proc. Conf, Design, Automation, and Test in Europe (DATE 07), EDA Consortium, 2007, pp. 1653-1658.
9. US Dept. of Energy, Energy Efficiency, and Renewable Energy, "Data Center Energy Efficiency Program," US DoE, 2008.
10. T. Venton et al., "A Linux-Based Tool for Hardware Bring Up, Linux Development and Manufacturing," IBM Systems J., vol. 44, no. 2, 2005, pp. 319-329.
161. A. Das et al., "Mitigating the Effects of Process Variations: Architectural Approaches for Improving Batch Performance," Proc. Workshop on Architectural Support for Gigascale Integration (ASGI), 2007;
162. B. Romanescu et al., "Reducing the Impact of Intra-Core Process Variability with Criticality-Based Resource Allocation and Prefetching," Proc. Conf. Computing Frontiers (CCFP 08), ACM Press, 2008, pp. 129-138.
163. N. Soundararajan et al., "Analysis and Solutions to Issue Queue Process Variation," Proc. IEEE/IFIP Int'l Conf. Dependable Systems and Networks, Dependable Computing and Comm. Symp. (DNS-DCCS 08), IEEE Press, 2008, pp. 11-21.
164. A. Tiwari, S.R. Sarangi, and J. Torellas, "ReCycle: Pipeline Adaptation to Tolerate Process Variation," ACM SIGARCH Computer Architecture News, vol. 35, no. 2, 2007, pp. 323-334.
165. J. Choi et al., "Thermal-Aware Task Scheduling at the Systems Software Level," Proc. Int'l Symp. Low Power Electronics and Design (ISLPED 07), ACM Press, 2007, pp. 213-217.
166. M. DeVuyst, R. Kumar, and D. Tullsen, "Exploiting Unbalanced Thread Scheduling for Energy and Performance on a CMP of SMT Processors," Proc. 20th Int'l Parallel and Distributed Processing Symp. (IPDPS 06), IEEE Press, 2006.

Index Terms:
dynamic temperature management, multicore architectures, thermal variation, activity migration, temperature-aware scheduling, thermal imaging
Eren Kursun, Chen-Yong Cher, "Temperature Variation Characterization and Thermal Management of Multicore Architectures," IEEE Micro, vol. 29, no. 1, pp. 116-126, Jan.-Feb. 2009, doi:10.1109/MM.2009.18
Usage of this product signifies your acceptance of the Terms of Use.