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Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications
November/December 2008 (vol. 28 no. 6)
pp. 47-56
ASCII Text
x 
 
Philip G. Emma, William R. Reohr, Mesut Meterelliyoz, "Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications," IEEE Micro, vol. 28, no. 6, pp. 47-56, November/December, 2008.
 
 
BibTex
x
 
@article{ 10.1109/MM.2008.93,
author = {Philip G. Emma and William R. Reohr and Mesut Meterelliyoz},
title = {Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications},
journal ={IEEE Micro},
volume = {28},
number = {6},
issn = {0272-1732},
year = {2008},
pages = {47-56},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2008.93},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications
IS - 6
SN - 0272-1732
SP47
EP56
EPD - 47-56
A1 - Philip G. Emma,
A1 - William R. Reohr,
A1 - Mesut Meterelliyoz,
PY - 2008
KW - cache structures
KW - DRAM
KW - error-correction code
KW - refresh rates
VL - 28
JA - IEEE Micro
ER -
 
Philip G. Emma, IBM T.J. Watson Research Center
William R. Reohr, IBM T.J. Watson Research Center
Mesut Meterelliyoz, IBM T.J. Watson Research Center
Caches use data very differently than main memory does, so DRAM caches can have dramatically different refresh requirements. Making canonical assumptions about retention times in DRAM can be drastic overkill within the cache context. Using standard refresh rates may be unnecessary and can be a significant waste of cache utilization and power. In this article, we view "retention time" in a new way by using statistical populations more appropriate for caches, and we suggest uses of a cache's inherent error-control mechanisms to reduce refresh rates by several orders of magnitude.

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Index Terms:
cache structures, DRAM, error-correction code, refresh rates
Citation:
Philip G. Emma, William R. Reohr, Mesut Meterelliyoz, "Rethinking Refresh: Increasing Availability and Reducing Power in DRAM for Cache Applications," IEEE Micro, vol. 28, no. 6, pp. 47-56, Nov.-Dec. 2008, doi:10.1109/MM.2008.93
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