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Multitasking Parallel Method for High-End Embedded Appliances
September/October 2008 (vol. 28 no. 5)
pp. 54-62
ASCII Text
x 
 
Junji Sakai, Inoue Hiroaki, Sunao Torii, Masato Edahiro, "Multitasking Parallel Method for High-End Embedded Appliances," IEEE Micro, vol. 28, no. 5, pp. 54-62, September/October, 2008.
 
 
BibTex
x
 
@article{ 10.1109/MM.2008.75,
author = {Junji Sakai and Inoue Hiroaki and Sunao Torii and Masato Edahiro},
title = {Multitasking Parallel Method for High-End Embedded Appliances},
journal ={IEEE Micro},
volume = {28},
number = {5},
issn = {0272-1732},
year = {2008},
pages = {54-62},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2008.75},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Multitasking Parallel Method for High-End Embedded Appliances
IS - 5
SN - 0272-1732
SP54
EP62
EPD - 54-62
A1 - Junji Sakai,
A1 - Inoue Hiroaki,
A1 - Sunao Torii,
A1 - Masato Edahiro,
PY - 2008
KW - multicore processor
KW - asymmetric multiprocessing
KW - performance guarantee
VL - 28
JA - IEEE Micro
ER -
 
Junji Sakai, NEC Corporation
Inoue Hiroaki, NEC Corporation
Sunao Torii, NEC Corporation
Masato Edahiro, NEC Corporation
Embedded appliances such as high-end cell phones require not only high performance but also a performance guarantee. The authors demonstrate a performance guarantee framework using an asymmetric multiprocessing approach. They implemented the proposed method on a multicore processor using Linux. Evaluation results show that the method improves the performance guarantee while maintaining software compatibility.

1. Y. Furuya, "From the Market Experience with 3G Handsets in Japan," presentation at the GSM World Congress 2004; www.gsmworld.com/technology/3g/presentations/ 3gsm_2004yukitsuna_furuya.pdf.
2. D. Brash, "The ARM Architecture Version 6 (ARMv6)," white paper, ARM 2002, www.arm.com/pdfsARMv6_Architecture.pdf.
3. "OMAP2 Architecture," product bulletin, Texas Instruments, 2005, http://focus.ti.com/pdfs/wtbuTI_omap2420.pdf .
4. MP211 Application Processor Technology Highlights, www.necel.com/en/techhighlights/application_processor index.html.
5. N. Guenov, "Inside the New MPC8641D Dual-Core PowerPC Processor," Freescale Technology Forum, 2005, www.freescale.com/files/abstract/overview FTF_BN102.pdf.
6. D. Geer, "Chip Makers Turn to Multicore Processors," Computer, vol. 38, no. 5, May 2005, pp. 11-13.
7. S. Brosky et al., "Shielded Processors: Guaranteeing Sub-millisecond Response in Standard Linux," Proc. Int'l Parallel and Distributed Processing Symp., (IPDPS 03), IEEE CS Press, 2003, p. 120a.
8. A. Moshovos et al., "JETTY: Filtering Snoops for Reduced Energy Consumption in SMP Servers," Proc. 7th Int'l Symp. High-Performance Computer Architecture (HPCA 01), IEEE CS Press, 2001, pp. 85-96.
9. S. Torii et al., "A 600MIPS 120 mW 70 μA Leakage Triple-CPU Mobile Application Processor Chip," Proc. 2005 IEEE Int'l Solid-State Circuits Conf., Digest of Technical Papers (ISSCC 05), IEEE Press, 2005, pp. 136-137.
10. J. Sakai et al., "Multi-Tasking Parallel Method on MP211 Multicore Application Processor," Proc. IEEE Symp. Low-Power and High-Speed Chips (COOLChips VIII), 2005, pp. 198-211.

Index Terms:
multicore processor, asymmetric multiprocessing, performance guarantee
Citation:
Junji Sakai, Inoue Hiroaki, Sunao Torii, Masato Edahiro, "Multitasking Parallel Method for High-End Embedded Appliances," IEEE Micro, vol. 28, no. 5, pp. 54-62, Sept.-Oct. 2008, doi:10.1109/MM.2008.75
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