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Parallel Computing Experiences with CUDA
July/August 2008 (vol. 28 no. 4)
pp. 13-27
ASCII Text
x 
 
Michael Garland, Scott Le Grand, John Nickolls, Joshua Anderson, Jim Hardwick, Scott Morton, Everett Phillips, Yao Zhang, Vasily Volkov, "Parallel Computing Experiences with CUDA," IEEE Micro, vol. 28, no. 4, pp. 13-27, July/August, 2008.
 
 
BibTex
x
 
@article{ 10.1109/MM.2008.57,
author = {Michael Garland and Scott Le Grand and John Nickolls and Joshua Anderson and Jim Hardwick and Scott Morton and Everett Phillips and Yao Zhang and Vasily Volkov},
title = {Parallel Computing Experiences with CUDA},
journal ={IEEE Micro},
volume = {28},
number = {4},
issn = {0272-1732},
year = {2008},
pages = {13-27},
doi = {http://doi.ieeecomputersociety.org/10.1109/MM.2008.57},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Parallel Computing Experiences with CUDA
IS - 4
SN - 0272-1732
SP13
EP27
EPD - 13-27
A1 - Michael Garland,
A1 - Scott Le Grand,
A1 - John Nickolls,
A1 - Joshua Anderson,
A1 - Jim Hardwick,
A1 - Scott Morton,
A1 - Everett Phillips,
A1 - Yao Zhang,
A1 - Vasily Volkov,
PY - 2008
KW - parallel architectures
KW - processor architectures
KW - computer systems organization
KW - concurrent programming structures
KW - graphics processors
KW - programming languages
KW - computer graphics
KW - computing methodologies
VL - 28
JA - IEEE Micro
ER -
 
John Nickolls, NVIDIA
Joshua Anderson, Iowa State University and Ames Laboratory
Jim Hardwick, TechniScan Medical Systems
Everett Phillips, University of California, Davis
Yao Zhang, University of California, Davis
Vasily Volkov, University of California, Berkeley
The CUDA programming model provides a straightforward means of describing inherently parallel computations, and NVIDIA's Tesla GPU architecture delivers high computational throughput on massively parallel problems. This article surveys experiences gained in applying CUDA to a diverse set of problems and the parallel speedups over sequential codes running on traditional CPU architectures attained by executing key computations on the GPU.

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Index Terms:
parallel architectures, processor architectures, computer systems organization, concurrent programming structures, graphics processors, programming languages, computer graphics, computing methodologies
Citation:
Michael Garland, Scott Le Grand, John Nickolls, Joshua Anderson, Jim Hardwick, Scott Morton, Everett Phillips, Yao Zhang, Vasily Volkov, "Parallel Computing Experiences with CUDA," IEEE Micro, vol. 28, no. 4, pp. 13-27, July-Aug. 2008, doi:10.1109/MM.2008.57
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