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Issue No.01 - January/February (2008 vol.28)
pp: 21-31
Ravi Rajwar , Intel
Naveen Neelakantam , University of Illinois at Urbana-Champaign
Hardware support for atomic execution can both greatly simplify the implementation of existing speculative compiler optimizations and enable new ones. Given current technology trends, this hardware and software cooperation is a compelling approach; such optimizations can simultaneously improve single-thread performance and reduce power consumption in both sequential and multithreaded applications.
compiler-architecture interactions, architecture, atomicity, checkpoint, compiler, isolation, Java, optimization, speculation
Ravi Rajwar, Suresh Srinivas, Uma Srinivasan, Naveen Neelakantam, "Hardware Atomicity: An Effective Abstraction for Reliable Software Speculation", IEEE Micro, vol.28, no. 1, pp. 21-31, January/February 2008, doi:10.1109/MM.2008.7
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