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Low-Power Design and Temperature Management
November/December 2007 (vol. 27 no. 6)
pp. 46-57
Kevin Skadron, University of Virginia
Pradip Bose, IBM T.J. Watson Research Center
Kanad Ghose, State University of New York Binghamton
Resit Sendag, University of Rhode Island
Joshua J. Yi, Freescale Semiconductor
Derek Chiou, University of Texas at Austin
One of the primary concerns for microprocessor designers has always been balancing power and thermal management while minimizing performance loss. Rather than generate solutions to this dilemma, the advent of multicore chips has raised a host of new challenges. This discussion with Pradip Bose and Kanad Ghose, excerpted from a 2007 CARD Workshop panel, explores the future of low-power design and temperature management.

1. J. Choi et al., "Thermal-Aware Task Scheduling at the System Software Level," Proc. Int'l Symp. Low Power Electronics and Design, ACM Press, 2007.
2. H.F. Hamann et al., "Hotspot-Limited Microprocessors: Direct Temperature and Power Distribution Measurements," IEEE J. Solid-State Circuits, vol. 42, no. 1, Jan. 2007, pp. 56-65.
3. E. İpek et al., "Core Fusion: Accommodating Software Diversity in Chip Multiprocessors," Proc. Int'l Symp. Computer Architecture (ISCA 07), ACM Press, 2007, pp. 186-197.

Index Terms:
low-power design; power management; hardware; energy-aware systems; temperature-aware design
Citation:
Kevin Skadron, Pradip Bose, Kanad Ghose, Resit Sendag, Joshua J. Yi, Derek Chiou, "Low-Power Design and Temperature Management," IEEE Micro, vol. 27, no. 6, pp. 46-57, Nov.-Dec. 2007, doi:10.1109/MM.2007.104
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