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Issue No.05 - September/October (2007 vol.27)
pp: 51-61
Arvind Singh , Intel
Nitin Borkar , Intel
ABSTRACT
A multicore processor in 65-nm technology with 80 single-precision, floating-point cores delivers performance in excess of a teraflops while consuming less than 100 W. A 2D on-die mesh interconnection network operating at 5 GHz provides the high-performance communication fabric to connect the cores. The network delivers a bisection bandwidth of 2.56 Terabits per second and a per hop fall-through latency of 1 nanosecond.
INDEX TERMS
CMOS digital integrated circuits, interconnection fabric, crossbar, mesh, router, network on chip
CITATION
Yatin Hoskote, Sriram Vangal, Arvind Singh, Nitin Borkar, Shekhar Borkar, "A 5-GHz Mesh Interconnect for a Teraflops Processor", IEEE Micro, vol.27, no. 5, pp. 51-61, September/October 2007, doi:10.1109/MM.2007.77
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