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Characterizing the Cell EIB On-Chip Network
September/October 2007 (vol. 27 no. 5)
pp. 6-14
Thomas William Ainsworth, Northrop Grumman Space Technology
Timothy Mark Pinkston, University of Southern California
On-chip network design has become an increasingly important component of computer architecture. The Cell Broadband Engine's Element Interconnect Bus, with its four data rings and common command bus for end-to-end transaction control, interconnects more nodes than most commercial on-chip networks. To help understand on-chip network design and performance issues in the context of a commercial multicore chip, this article evaluates the EIB network using conventional latency and throughput characterization methods.

1. T.M. Pinkston and J. Shin, "Trends Toward On-Chip Networked Microsystems," Int'l J. High Performance Computing and Networking, vol. 3, no. 1, Dec. 2005, pp. 3-18.
2. L. Benini and G. De Micheli, "Networks on Chip: A New SoC Paradigm," Computer, vol. 35, no. 1, 2002, pp. 70-80.
3. W.J. Dally, "Interconnect Limited VLSI Architecture," Proc. Int'l Interconnect Technology Conf. (IITC 99), IEEE Press, 1999, pp. 15-17.
4. W.J. Dally and B. Towles, "Route Packets, Not Wires: On-Chip Interconnection Networks," Proc. Design Automation Conf. (DAC 01), ACM Press, 2001, pp. 684-689.
5. J.A. Kahle, "Introduction to the Cell Multiprocessor," IBM J. Research and Development, vol. 49, no. 4–5, 2005, pp. 589-604.
6. T. Chen et al., "Cell Broadband Engine Architecture and its First Implementation: A Performance View,"29 Nov. 2005, www-128.ibm.com/developerworks/power/library pa-cellperf.
7. D. Krolak, "Just Like Being There: Papers from the Fall Processor Forum 2005: Unleashing the Cell Broadband Engine Processor—The Element Interconnect Bus,"29 Nov. 2005, www-128.ibm.com/developerworks/power/library pa-fpfeib.
8. T.M. Pinkston and J. Duato, "Appendix E: Interconnection Networks," Computer Architecture: A Quantitative Approach, 4th ed, J.L. Hennessy, and D.A. Patterson eds. Elsevier Publishers, 2007, pp. E-1-E-114.
9. M. Kistler, M. Perrone, and F. Petrini, "Cell Microprocessor Communication Network: Built for Speed," IEEE Micro, vol. 26, no. 3, May–June 2006, pp. 10-23.
10. DeveloperWorks, IBM, "Meet the Experts: David Krolak on the Cell Broadband Engine EIB Bus,"6 Dec. 2005, www-128.ibm.com/developerworks/librarypa-expert9 .
11. DeveloperWorks, IBM, "Just Like Being There: Papers from the Fall Processor Forum 2005: Unleashing the Cell Broadband Engine Processor: A Programming Model Approach,"16 Nov. 2005, www-128.ibm.com/developerworks/librarypa-fpfunleashing .
12. DeveloperWorks, IBM, "Meet the Experts: Alex Chow on Cell Broadband Engine Programming Models,"22 Nov. 2005, www-128.ibm.com/developerworks/librarypa-expert8 .
13. V. Srinivasan, A. Santhanam, and M. Srinivasan, "Cell Broadband Engine Processor DMA Engines, Part 1: The Little Engines that Move Data,"6 Dec. 2005, www-128.ibm.com/developerworks/power/library pa-celldmas.

Index Terms:
interconnection architectures, multiple data stream architectures, multicore architectures, multiprocessors, on-chip interconnection networks
Citation:
Thomas William Ainsworth, Timothy Mark Pinkston, "Characterizing the Cell EIB On-Chip Network," IEEE Micro, vol. 27, no. 5, pp. 6-14, Sept.-Oct. 2007, doi:10.1109/MM.2007.81
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