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2007
Issue No. 5 - September/October
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IEEE Micro
September/October 2007 (vol. 27 no. 5)
ISSN: 0272-1732
Table of Contents
Features
Guest Editors' Introduction: On-Chip Interconnects for Multicores
(HTML)
Partha Kundu
, Intel
Li-Shiuan Peh
, Princeton University
pp. 3-5
ABSTRACT
PDF
HTML
Characterizing the Cell EIB On-Chip Network
(Abstract)
Thomas William Ainsworth
, Northrop Grumman Space Technology
Timothy Mark Pinkston
, University of Southern California
pp. 6-14
ABSTRACT
PDF
HTML
PURCHASE ARTICLE: $19
On-Chip Interconnection Architecture of the Tile Processor
(Abstract)
David Wentzlaff
, Tilera
Patrick Griffin
, Tilera
Henry Hoffmann
, Tilera
Liewei Bao
, Tilera
Bruce Edwards
, Tilera
Carl Ramey
, Tilera
Matthew Mattina
, Tilera
Chyi-Chang Miao
, Tilera
John F. Brown III
, Tilera
Anant Agarwal
, Tilera
pp. 15-31
ABSTRACT
PDF
HTML
PURCHASE ARTICLE: $19
Synchronization through Communication in a Massively Parallel Processor Array
(Abstract)
Mike Butts
, Ambric
pp. 32-40
ABSTRACT
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PURCHASE ARTICLE: $19
On-Chip Interconnection Networks of the TRIPS Chip
(Abstract)
Paul Gratz
, The University of Texas at Austin
Changkyu Kim
, Intel
Karthikeyan Sankaralingam
, University of Wisconsin-Madison
Heather Hanson
, IBM
Premkishore Shivakumar
, The University of Texas at Austin
Stephen W. Keckler
, The University of Texas at Austin
Doug Burger
, The University of Texas at Austin
pp. 41-50
ABSTRACT
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HTML
PURCHASE ARTICLE: $19
A 5-GHz Mesh Interconnect for a Teraflops Processor
(Abstract)
Yatin Hoskote
, Intel
Sriram Vangal
, Intel
Arvind Singh
, Intel
Nitin Borkar
, Intel
Shekhar Borkar
, Intel
pp. 51-61
ABSTRACT
PDF
HTML
PURCHASE ARTICLE: $19
Architecture of the Scalable Communications Core's Network on Chip
(Abstract)
David Arditti Ilitzky
, Intel
Jeffrey D. Hoffman
, Intel
Anthony Chun
, Intel
Brando Perez Esparza
, Intel
pp. 62-74
ABSTRACT
PDF
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PURCHASE ARTICLE: $19
Bringing NoCs to 65 nm
(Abstract)
Antonio Pullini
, Politecnico di Torino
Federico Angiolini
, Università di Bologna
Srinivasan Murali
, École Polytechnique Fédérale de Lausanne
David Atienza
, Universidad Complutense de Madrid
Giovanni De Micheli
, École Polytechnique Fédérale de Lausanne
Luca Benini
, Università di Bologna
pp. 75-85
ABSTRACT
PDF
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PURCHASE ARTICLE: $19
Challenges and Promising Results in NoC Prototyping Using FPGAs
(Abstract)
Umit Y. Ogras
, Carnegie Mellon University
Radu Marculescu
, Carnegie Mellon University
Hyung Gyu Lee
, Samsung Electronics
Puru Choudhary
, Carnegie Mellon University
Diana Marculescu
, Carnegie Mellon University
Michael Kaufman
, Carnegie Mellon University
Peter Nelson
, Carnegie Mellon University
pp. 86-95
ABSTRACT
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PURCHASE ARTICLE: $19
Research Challenges for On-Chip Interconnection Networks
(Abstract)
John D. Owens
, University of California, Davis
William J. Dally
, Stanford University
Ron Ho
, Sun Microsystems
D.N. (Jay) Jayasimha
, Intel Corporation
Stephen W. Keckler
, University of Texas at Austin
Li-Shiuan Peh
, Princeton University
pp. 96-108
ABSTRACT
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PURCHASE ARTICLE: $19
Micro Law
Federal Appeals Court Sees Potential Antitrust Violation in Standardization Skullduggery
(Abstract)
Richard Stern
pp. 109-110
ABSTRACT
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PURCHASE ARTICLE: $19
Micro Economics
Dog Days for Broadband
(Abstract)
Shane Greenstein
, Kellogg Graduate School of Management
pp. 112, 111
ABSTRACT
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PURCHASE ARTICLE: $19
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