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Issue No.01 - January/February (2007 vol.27)
pp: 77-83
Shashidhar Mysore , University of California, Santa Barbara
Banit Agrawal , University of California, Santa Barbara
Navin Srivastava , University of California, Santa Barbara
Sheng-Chih Lin , University of California, Santa Barbara
Kaustav Banerjee , University of California, Santa Barbara
Timothy Sherwood , University of California, Santa Barbara
ABSTRACT
In today's complex processors, specialized profiling and introspection hardware would be incredibly beneficial to software developers, but most proposals for its addition would increase the cost of every die manufactured. Modular, "snap-on" analysis hardware, stacked vertically with the processor die using a 3D interconnect, could be included with developer systems to assist in debugging and testing, and omitted from consumer systems to keep them economically competitive.
INDEX TERMS
performance evaluation, profiling, 3D interconnect, debugging, testing, 3D stacking
CITATION
Shashidhar Mysore, Banit Agrawal, Navin Srivastava, Sheng-Chih Lin, Kaustav Banerjee, Timothy Sherwood, "3D Integration for Introspection", IEEE Micro, vol.27, no. 1, pp. 77-83, January/February 2007, doi:10.1109/MM.2007.1
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