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Cell Multiprocessor Communication Network: Built for Speed
May/June 2006 (vol. 26 no. 3)
pp. 10-23
Michael Kistler, IBM Austin Research Laboratory
Michael Perrone, IBM TJ Watson Research Center
Fabrizio Petrini, Pacific Northwest National Laboratory
Multicore designs promise various power-performance and area-performance benefits. But inadequate design of the on-chip communication network can deprive applications of these benefits. To illuminate this important point in multicore processor design, the authors analyze the Cell processor's communication network, using a series of benchmarks involving DMA traffic patterns and synchronization protocols.
Index Terms:
Cell Broadband Engine processor, multiprocessor communication network
Citation:
Michael Kistler, Michael Perrone, Fabrizio Petrini, "Cell Multiprocessor Communication Network: Built for Speed," IEEE Micro, vol. 26, no. 3, pp. 10-23, May-June 2006, doi:10.1109/MM.2006.49
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