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Opportunistic Transient-Fault Detection
January/February 2006 (vol. 26 no. 1)
pp. 92-99
Mohamed A. Gomaa, Purdue University
T. N. Vijaykumar, Purdue University
CMOS scaling continues to enable faster transistors and lower supply voltage, improving microprocessor performance and reducing per-transistor power. The downside of scaling is increased susceptibility to soft errors due to strikes by cosmic particles and radiation from packaging materials. The result is degraded reliability in future commodity microprocessors. The authors target better coverage while incurring minimal performance degradation by opportunistically using redundancy.
Index Terms:
Transient-fault detection, CMOS scaling, soft errors, redundancy
Citation:
Mohamed A. Gomaa, T. N. Vijaykumar, "Opportunistic Transient-Fault Detection," IEEE Micro, vol. 26, no. 1, pp. 92-99, Jan.-Feb. 2006, doi:10.1109/MM.2006.20
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