This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
Adaptive History-Based Memory Schedulers for Modern Processors
January/February 2006 (vol. 26 no. 1)
pp. 22-29
Ibrahim Hur, IBM Corp. and The University of Texas at Austin
Calvin Lin, The University of Texas at Austin
Careful memory scheduling can increase memory bandwidth and overall system performance. We present a new memory scheduler that makes decisions based on the history of recently scheduled operations, providing two advantages: It can better reason about the delays associated with complex DRAM structure, and it can adapt to different observed workload.
Index Terms:
Memory schedulers, memory bandwidth, processors, DRAM, IBM Power5
Citation:
Ibrahim Hur, Calvin Lin, "Adaptive History-Based Memory Schedulers for Modern Processors," IEEE Micro, vol. 26, no. 1, pp. 22-29, Jan.-Feb. 2006, doi:10.1109/MM.2006.1
Usage of this product signifies your acceptance of the Terms of Use.