IEEE Micro 2005 Annual Index, Vol. 25
NOVEMBER/DECEMBER 2005 (Vol. 25, No. 6) pp. 92-103
0272-1732/05/$31.00 © 2005 IEEE

Published by the IEEE Computer Society
IEEE Micro 2005 Annual Index, Vol. 25
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Author Index

A

Addison, D., see Beecroft, J., July-Aug. 2005 34-47

Adve, S.V., and P. Sanda. Reliability-aware microarchitecture; Nov.-Dec. 2005 8-9

Agerwala, T., and S. Chatterjee. Computer architecture: challenges and opportunities for the next decade; May-June 2005 58-69

Aingaran, K., see Kongetira, P., March-April 2005 21-29

Akhbarizadeh, M.J.,M. Nourani, and C.D. Cantrell. Prefix segregation scheme for a TCAM-based IP forwarding engine; July-Aug. 2005 48-63

Anguita, M., and J.M. Martinez-Lechado. MP3 optimization exploiting processor architecture and using better algorithms; May- June 2005 81-92

Arekapudi Srikanth, see Srikanth Arekapudi, Jan.-Feb. 2005 70-78

Asano, S., see Maeda, S., Sept.-Oct. 2005 20-29

Asano, T., see Takahashi, O., Sept.-Oct. 2005 10-18

Asano, T.,T. Nakazato, A. Kawasumi, S.H. Dhong, O. Takahashi, M. White, S. Cottier, J. Silberman, and H. Yoshihara. Low-power design approach of 11FO4 256-Kbyte embedded SRAM for the synergistic processor element of a cell processor; Sept.-Oct. 2005 30-38

Avinash Karanth Kodi, and A. Louri. Design of a high-speed optical interconnect for scalable shared-memory multiprocessors; Jan.-Feb. 2005 41-49

Awazu, K., see Maeda, S., Sept.-Oct. 2005 20-29

B

Beecroft, J.,D. Addison, D. Hewson, M. McLaren, D. Roweth, F. Petrini, and J. Nieplocha.QSNET IIdefining high-performance network design; July-Aug. 2005 34-47

Bhatia, R., see McNairy, C., March-April 2005 10-20

Bingxin Shi, see Weidong Wu, July-Aug. 2005 64-72

Borkar, S. Designing reliable systems from unreliable components: the challenges of transistor variability and degradation; Nov-Dec 2005 10-16

Bose Pradip, see Jayanth Srinivasan, May-June 2005 70-80

Buyuktosunoglu, A., see Isci, C., Sept.-Oct. 2005 39-51

C

Cantrell, C.D., see Akhbarizadeh, M.J., July-Aug. 2005 48-63

Caprioli, P., see Chaudhry, S., May-June 2005 32-45

Cazorla, F., see Cristal, A., May-June 2005 48-57

Chang Yen-Jen, see Yen-Jen Chang, July-Aug. 2005 20-32

Chatterjee, S., see Agerwala, T., May-June 2005 58-69

Chaudhry, S.,P. Caprioli, S. Yip, and M. Tremblay. High-performance throughput computing; May-June 2005 32-45

Chuang, S.-T., see Srikanth Arekapudi, Jan.-Feb. 2005 70-78

Chung, E.S., see Gold, B.T., Nov-Dec 2005 51-59

Clark, D.W., see Qiang Wu, Sept.-Oct. 2005 52-62

Cook, R., see Takahashi, O., Sept.-Oct. 2005 10-18

Cottier, S., see Takahashi, O., Sept.-Oct. 2005 10-18

Cottier, S., see Asano, T., Sept.-Oct. 2005 30-38

Cristal, A.,O.J. Santana, F. Cazorla, M. Galluzzi, T. Ramirez, M. Pericas, and M. Valero. Kilo-instruction processors: overcoming the memory wall; May-June 2005 48-57

D

Dally, B., and K. Diefendorff. Guest editors' introduction: Hot Chips 16: Power, parallelism, and memory performance; March-April 2005 8-9

Delgado, O., see Takahashi, O., Sept.-Oct. 2005 10-18

Dhong, S.H., see Takahashi, O., Sept.-Oct. 2005 10-18

Dhong, S.H., see Asano, T., Sept.-Oct. 2005 30-38

Diefendorff, K., see Dally, B., March-April 2005 8-9

Dunigan, T.H.,Jr., J.S. Vetter, J.B. White, III, and P.H. Worley. Performance evaluation of the Cray X1 distributed shared-memory architecture; Jan.-Feb. 2005 30-40

E

Eberle, H.,S. Shantz, V. Gupta, N. Gura, L. Rarick, and L. Spracklen.Accelerating next-generation public-key cryptosystems on general-purpose CPUs; March-April 2005 52-59

Emma, P.G. Inventions and the creative process; May-June 2005 96, 93-95

Emma, P.G. What is patentable?; July-Aug. 2005 7-9

Emma, P.G. Writing the claims for a patent; Nov.-Dec. 2005 79-81

F

Falcon, A.,J. Stark, A. Ramirez, K. Lai, and M. Valero. Better branch prediction through prophet/critic hybrids; Jan.-Feb. 2005 80-89

Falsafi, B., see Gold, B.T., Nov-Dec 2005 51-59

Feipei Lai, see Yen-Jen Chang, July-Aug. 2005 20-32

Flachs, B., see Takahashi, O., Sept.-Oct. 2005 10-18

Flynn, M.J., and P. Hung. Microprocessor design issues: thoughts on the road ahead; May-June 2005 16-31

G

Galluzzi, M., see Cristal, A., May-June 2005 48-57

Gold, B.T.,Jangwoo Kim, J.C. Smolens, E.S. Chung, V. Liaskovitis, E. Nurvitadhi, B. Falsafi, J.C. Hoe, and A.G. Nowatzyk. TRUSS: A reliable, scalable server architecture; Nov-Dec 2005 51-59

Gravinghoff, A., see Keller, J., March-April 2005 60-69

Greenstein, S. Not a mellifluous march to maturity [computer market]; Jan.-Feb. 2005 104, 102-103

Greenstein, S. The anatomy of foresight traps [foresight management]; May-June 2005 10-12

Greenstein, S. Communications consolidation after an era of no restraints [Micro Economics]; March-April 2005 72, 70-71

Greenstein, S. Explorers and expanders, both early and late [commercial technology markets]; July-Aug. 2005 77-79

Greenstein, S. Outsourcing and climbing a value chain [Micro Economics]; Sept.-Oct. 2005 84, 83

Greenstein, S. Wireless access and electrical markets: Becoming similar? [Micro Economics]; Nov.-Dec. 2005 6-7

Gupta, V., see Eberle, H., March-April 2005 52-59

Gura, N., see Eberle, H., March-April 2005 52-59

H

Hewson, D., see Beecroft, J., July-Aug. 2005 34-47

Hirairi, K., see Takahashi, O., Sept.-Oct. 2005 10-18

Hoe, J.C., see Gold, B.T., Nov-Dec 2005 51-59

Hung, P., see Flynn, M.J., May-June 2005 16-31

Hwa-Joon Oh, see Takahashi, O., Sept.-Oct. 2005 10-18

I

Isci, C., M. Martonosi, and A. Buyuktosunoglu. Long-term workload phases: Duration predictions and applications to DVFS; Sept.-Oct. 2005 39-51

Iyer, R.K., see Saggese, G.P., Nov-Dec 2005 30-39

Iyer, R.K.,N.M. Nakka, Z.T. Kalbarczyk, and S. Mitra. Recent advances and new avenues in hardware-level reliability support; Nov-Dec 2005 18-19

J

Jangwoo Kim, see Gold, B.T., Nov-Dec 2005 51-59

Jayanth Srinivasan, S.V. Adve, Pradip Bose, and J.A. Rivers. Lifetime reliability: toward an architectural solution; May-June 2005 70-80

Jian Shi, see Weidong Wu, July-Aug. 2005 64-72

Jieming Qi, see Takahashi, O., Sept.-Oct. 2005 10-18

Jiuxing Liu, A. Mamidala, V. Vishnu, and D.K. Panda. Evaluating InfiniBand performance with PCI Express; Jan.-Feb. 2005 20-29

Juang, P., see Qiang Wu, Sept.-Oct. 2005 52-62

K

Kalbarczyk, Z., see Saggese, G.P., Nov-Dec 2005 30-39

Kalbarczyk, Z.T., see Iyer, R.K., Nov-Dec 2005 18-19

Karanth Kodi Avinash, see Avinash Karanth Kodi, Jan.-Feb. 2005 41-49

Katz, R.H., see Yu, F., Jan.-Feb. 2005 50-59

Kawasumi, A., see Takahashi, O., Sept.-Oct. 2005 10-18

Kawasumi, A., see Asano, T., Sept.-Oct. 2005 30-38

Keller, J., and A. Gravinghoff. Thread-based virtual duplex systems in embedded environments; March-April 2005 60-69

Keslassy, I., see Srikanth Arekapudi, Jan.-Feb. 2005 70-78

Kim Jangwoo, see Gold, B.T., Nov-Dec 2005 51-59

Kodi Avinash Karanth, see Avinash Karanth Kodi, Jan.-Feb. 2005 41-49

Kongetira, P.,K. Aingaran, and K. Olukotun. Niagara: a 32-way multithreaded Sparc processor; March-April 2005 21-29

Kota Rajesh, see Rajesh Kota, March-April 2005 30-40

Krishnan, V., and D. Mayhew. Localized congestion control in advanced switching interconnects; Jan.-Feb. 2005 10-11

L

Lach, J., see Zhijian Lu, Nov-Dec 2005 40-49

Lai, K., see Falcon, A., Jan.-Feb. 2005 80-89

Lai Feipei, see Yen-Jen Chang, July-Aug. 2005 20-32

Lakshman, T.V., see Yu, F., Jan.-Feb. 2005 50-59

Leenstra, J., see Takahashi, O., Sept.-Oct. 2005 10-18

Liaskovitis, V., see Gold, B.T., Nov-Dec 2005 51-59

Ling Zuo, see Weidong Wu, July-Aug. 2005 64-72

Li-Shiuan Peh, see Qiang Wu, Sept.-Oct. 2005 52-62

Liu Jiuxing, see Jiuxing Liu, Jan.-Feb. 2005 20-29

Lockwood, J.W., see Madhusudan, B., Jan.-Feb. 2005 60-69

Louri, A., see Avinash Karanth Kodi, Jan.-Feb. 2005 41-49

Lu Zhijian, see Zhijian Lu, Nov-Dec 2005 40-49

M

Machida, T., see Takahashi, O., Sept.-Oct. 2005 10-18

Madhusudan, B., and J.W. Lockwood. A hardware-accelerated system for real-time worm detection; Jan.-Feb. 2005 60-69

Maeda, S.,S. Asano, T. Shimada, K. Awazu, and H. Tago. A real-time software platform for cell processor; Sept.-Oct. 2005 20-29

Mamidala, A., see Jiuxing Liu, Jan.-Feb. 2005 20-29

Marculescu, D., and E. Talpes. Energy awareness and uncertainty in design at microarchitecture level; Sept.-Oct. 2005 64-76

Martinez-Lechado, J.M., see Anguita, M., May-June 2005 81-92

Martonosi, M., see Isci, C., Sept.-Oct. 2005 39-51

Martonosi, M., see Qiang Wu, Sept.-Oct. 2005 52-62

Mateosian, R. Fearless Change: Patterns for Introducing New Ideas (Mann, M.L. and Rising, L.; 2004) [book review]; Jan.-Feb. 2005 98-99

Mateosian, R. Head First Design Patterns (Freeman, E. and Freeman, E.; 2004) [book review]; Jan.-Feb. 2005 98

Mateosian, R. Refactoring to Patterns (Kerievsky, J.; 2004) [book review]; Jan.-Feb. 2005 98

Mateosian, R. A Semantic Web Primer (Antoniou, G. and van Harmelen, F.; 2004) [book review]; Jan.-Feb. 2005 99

Mateosian, R.Mind Hacks: Tips and Tools for Using Your Brain (Stafford, T. and Webb, M.; 2004) [book review]; Jan.-Feb. 2005 99

Mateosian, R. Software Endgames: Eliminating Defects, Controlling Change, and the Countdown to On-Time Delivery (Galen, R.; 2005) [book review]; Jan.-Feb. 2005 99

Mateosian, R.Working Effectively with Legacy Code (Feathers, M.; 2005) [book review]; Jan.-Feb. 2005 99

Mateosian, R. Revolution in the Valley - The Insanely Great Story of How the Mac Was Made (Hertzfeld, A.; 2004) [book review]; March-April 2005 6-7

Mateosian, R. They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004) [book review]; March-April 2005 7

Mateosian, R. Thoughtful Interaction Design - A Design Perspective on Information Technology (Lowgren, J. and Stolterman, E.; 2005) [book review]; March-April 2005 7

Mateosian, R. Dealing with globalization [review of 'The World is Flat: A Brief History of the Twenty-First Century' (Friedman, L.; 2005)]; May-June 2005 13-15

Mateosian, R.Database in Depth: Relational Theory for Practitioners (Date, C.J.; 2005) [book review]; July-Aug. 2005 80, 79

Mateosian, R.The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005) [book review]; July-Aug. 2005 80

Mateosian, R.Year-end cleanup [Micro Review]; Nov.-Dec. 2005 82-84

Mayhew, D., see Krishnan, V., Jan.-Feb. 2005 10-11

McKeown, N., see Srikanth Arekapudi, Jan.-Feb. 2005 70-78

McLaren, M., see Beecroft, J., July-Aug. 2005 34-47

McNairy, C., and R. Bhatia. Montecito: a dual-core, dual-thread Itanium processor; March-April 2005 10-20

Michael, B., see Takahashi, O., Sept.-Oct. 2005 10-18

Mitra, S., see Iyer, R.K., Nov-Dec 2005 18-19

Montrym, J., and H. Moreton. The GeForce 6800; March-April 2005 41-51

Moreton, H., see Montrym, J., March-April 2005 41-51

Murakami, H., see Takahashi, O., Sept.-Oct. 2005 10-18

N

Nakazato, T., see Takahashi, O., Sept.-Oct. 2005 10-18

Nakazato, T., see Asano, T., Sept.-Oct. 2005 30-38

Nakka, N.M., see Iyer, R.K., Nov-Dec 2005 18-19

Nesbit, K.J., and J.E. Smith. Data cache prefetching using a global history buffer; Jan.-Feb. 2005 90-97

Nieplocha, J., see Beecroft, J., July-Aug. 2005 34-47

Nishikawa, H., see Takahashi, O., Sept.-Oct. 2005 10-18

Noro, H., see Takahashi, O., Sept.-Oct. 2005 10-18

Nourani, M., see Akhbarizadeh, M.J., July-Aug. 2005 48-63

Nowatzyk, A.G., see Gold, B.T., Nov-Dec 2005 51-59

Nurvitadhi, E., see Gold, B.T., Nov-Dec 2005 51-59

O

Oehler, R., see Rajesh Kota, March-April 2005 30-40

Oh Hwa-Joon, see Takahashi, O., Sept.-Oct. 2005 10-18

Olukotun, K., see Kongetira, P., March-April 2005 21-29

Onishi, S., see Takahashi, O., Sept.-Oct. 2005 10-18

P

Panda, D.K., see Jiuxing Liu, Jan.-Feb. 2005 20-29

Patel, S.J., see Saggese, G.P., Nov-Dec 2005 30-39

Peh Li-Shiuan, see Qiang Wu, Sept.-Oct. 2005 52-62

Pericas, M., see Cristal, A., May-June 2005 48-57

Petrini, F., see Beecroft, J., July-Aug. 2005 34-47

Pille, J., see Takahashi, O., Sept.-Oct. 2005 10-18

Pradip Bose, see Jayanth Srinivasan, May-June 2005 70-80

Q

Qiang Wu, P. Juang, M. Martonosi, Li-Shiuan Peh, and D.W. Clark. Formal control techniques for power-performance management in high performance; Sept.-Oct. 2005 52-62

Qi Jieming, see Takahashi, O., Sept.-Oct. 2005 10-18

R

Rajesh Kota, and R. Oehler. Horus: large-scale symmetric multiprocessing for Opteron systems; March-April 2005 30-40

Ramirez, A., see Falcon, A., Jan.-Feb. 2005 80-89

Ramirez, T., see Cristal, A., May-June 2005 48-57

Rarick, L., see Eberle, H., March-April 2005 52-59

Rashid, M.W.,E.J. Tan, M.C. Huang, and D.H. Albonesi. Power-efficient error tolerance in chip multiprocessors; Nov.-Dec. 2005 60-70

Rivers, J.A., see Jayanth Srinivasan, May-June 2005 70-80

Roweth, D., see Beecroft, J., July-Aug. 2005 34-47

S

Saggese, G.P.,N.J. Wang, Z. Kalbarczyk, S.J. Patel, and R.K. Iyer. An experimental study of soft errors in microprocessors; Nov-Dec 2005 30-39

Sanda, P., see Adve. S., Nov.-Dec. 2005 8-9

Santana, O.J., see Cristal, A., May-June 2005 48-57

Shantz, S., see Eberle, H., March-April 2005 52-59

Shi Bingxin, see Weidong Wu, July-Aug. 2005 64-72

Shi Jian, see Weidong Wu, July-Aug. 2005 64-72

Shimada, T., see Maeda, S., Sept.-Oct. 2005 20-29

Silberman, J., see Takahashi, O., Sept.-Oct. 2005 10-18

Silberman, J., see Asano, T., Sept.-Oct. 2005 30-38

Skadron, K., see Zhijian Lu, Nov-Dec 2005 40-49

Smith, J.E., see Nesbit, K.J., Jan.-Feb. 2005 90-97

Smolens, J.C., see Gold, B.T., Nov-Dec 2005 51-59

Spracklen, L., see Eberle, H., March-April 2005 52-59

Srikanth Arekapudi, S.-T. Chuang, I. Keslassy, and N. McKeown. Using hardware to configure a load-balanced switch; Jan.-Feb. 2005 70-78

Srinivasan Jayanth, see Jayanth Srinivasan, May-June 2005 70-80

Stan, M., see Zhijian Lu, Nov-Dec 2005 40-49

Stark, J., see Falcon, A., Jan.-Feb. 2005 80-89

Stasiak, D.,R. Chaudry, D. Cox, S. Posluszny, J. Warnock, S. Weitzel, D. Wendel, and M. Wang. Cell processor low-power design methodology; Nov.-Dec. 2005 71-78

Sterbenz, J.P.G., and D. Stiliadis. Guest editors' introduction: Special section on Hot Interconnects 12 [special section intro.]; Jan.-Feb. 2005 8-9

Stern, R.H. FTC cracks down on spyware and PC hijacking, but not true lies; Jan.-Feb. 2005 6-7, 100-1

Stern, R.H.The antitrust ghost in the standard-setting machine [IEEE standards and RAND licensing]; May-June 2005 7-9

Stern, R.H.Standardization skullduggery update: UMTS standard; July-Aug. 2005 73-76

Stern, R.H. Transnational electronic systems and patent infringement; Nov.-Dec. 2005 85-88

Stiliadis, D., see Sterbenz, J.P.G., Jan.-Feb. 2005 8-9

Suksoon Yong, see Takahashi, O., Sept.-Oct. 2005 10-18

T

Tago, H., see Maeda, S., Sept.-Oct. 2005 20-29

Takahashi, O.,T. Asano, R. Cook, S. Cottier, O. Delgado, S.H. Dhong, B. Flachs, K. Hirairi, A. Kawasumi, J. Leenstra, T. Machida, B. Michael, H. Murakami, H. Murakami, T. Nakazato, H. Nishikawa, H. Noro, Hwa-Joon Oh, S. Onishi, J. Pille, Jieming Qi, J. Silberman, N. Yano, Suksoon Yong, D. Wendel, and M. White. The power conscious design of the synergistic processor element of a cell processor; Sept.-Oct. 2005 10-18

Takahashi, O., see Asano, T., Sept.-Oct. 2005 30-38

Talpes, E., see Marculescu, D., Sept.-Oct. 2005 64-76

Tremblay, M., see Chaudhry, S., May-June 2005 32-45

V

Valero, M., see Falcon, A., Jan.-Feb. 2005 80-89

Valero, M., see Cristal, A., May-June 2005 48-57

Vetter, J.S., see Dunigan, T.H., Jr., Jan.-Feb. 2005 30-40

Vishnu, V., see Jiuxing Liu, Jan.-Feb. 2005 20-29

W

Wang, N.J., see Saggese, G.P., Nov-Dec 2005 30-39

Weidong Wu, Jian Shi, Ling Zuo, and Bingxin Shi. Power-efficient TCAMs for bursty access patterns; July-Aug. 2005 64-72

Wendel, D., see Takahashi, O., Sept.-Oct. 2005 10-18

White, J.B., III, see Dunigan, T.H., Jr., Jan.-Feb. 2005 30-40

White, M., see Takahashi, O., Sept.-Oct. 2005 10-18

White, M., see Asano, T., Sept.-Oct. 2005 30-38

Worley, P.H., see Dunigan, T.H., Jr., Jan.-Feb. 2005 30-40

Wu Qiang, see Qiang Wu, Sept.-Oct. 2005 52-62

Wu Weidong, see Weidong Wu, July-Aug. 2005 64-72

X

Xiadong Zhang, see Zhichun Zhu, July-Aug. 2005 10-19

Y

Yano, N., see Takahashi, O., Sept.-Oct. 2005 10-18

Yen-Jen Chang, and Feipei Lai.Dynamic zero-sensitivity scheme for low-power cache memories; July-Aug. 2005 20-32

Yip, S., see Chaudhry, S., May-June 2005 32-45

Yong Suksoon, see Takahashi, O., Sept.-Oct. 2005 10-18

Yoshihara, H., see Asano, T., Sept.-Oct. 2005 30-38

Yu, F.,R.H. Katz, and T.V. Lakshman. Efficient multimatch packet classification and lookup with TCAM; Jan.-Feb. 2005 50-59

Z

Zhang Xiadong, see Zhichun Zhu, July-Aug. 2005 10-19

Zhichun Zhu, and Xiadong Zhang. Look-ahead architecture adaptation to reduce processor power consumption; July-Aug. 2005 10-19

Zhijian Lu, J. Lach, M. Stan, and K. Skadron. Improved thermal management with reliability banking; Nov-Dec 2005 40-49

Zhu Zhichun, see Zhichun Zhu, July-Aug. 2005 10-19

Zuo Ling, see Weidong Wu, July-Aug. 2005 64-72

Subject Index

A
Associative memories

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

efficient multimatch packet class. and lookup, TCAM. Yu, F., +, Jan.-Feb. 2005 50-59

TCAM-based IP forwarding engine, prefix segreg. scheme. Akhbarizadeh, M.J., +, July-Aug. 2005 48-63

Audio coding

MP3 optim. exploiting processor archit. and better algms. Anguita, M., +, May-June 2005 81-92

Audio signal processing;
see Audio coding
B
Biocybernetics;
see Brain models
Book reviews

A Semantic Web Primer (Antoniou, G. and van Harmelen, F.; 2004). Mateosian, R., Jan.-Feb. 2005 99

Core Security Patterns: Best Practices and Strategies for J2EE, Web Services, and Identity Management (Steel, C., Nagappan, R., and Lai, R.; 2005). Mateosian, R., Nov.-Dec. 2005 82

Database in Depth: Relational Theory for Practitioners (Date, C.J.; 2005). Mateosian, R., July-Aug. 2005 80, 79

Fearless Change: Patterns for Introducing New Ideas (Manns, M.L. and Rising, L.; 2004). Mateosian, R., Jan.-Feb. 2005 98-99

Head First Design Patterns (Freeman, E. and Freeman, E.; 2004). Mateosian, R., Jan.-Feb. 2005 98

Mind Hacks: Tips and Tools for Using Your Brain (Stafford, T. and Webb, M.; 2004). Mateosian, R., Jan.-Feb. 2005 99

Prefactoring: Extreme Abstraction, Extreme Separation, Extreme Readability (Pugh, K.; 2005). Mateosian, R., Nov.-Dec. 2005 82

Refactoring to Patterns (Kerievsky, J.; 2004). Mateosian, R., Jan.-Feb. 2005 98

Revolution in the Valley - The Insanely Great Story of How the Mac Was Made (Hertzfeld, A.; 2004). Mateosian, R., March-April 2005 6-7

Software Endgames: Eliminating Defects, Controlling Change, and the Countdown to On-Time Delivery (Galen, R.; 2005). Mateosian, R., Jan.-Feb. 2005 99

The eBay Survival Guide: How to Make Money and Avoid Losing Your Shirt (Banks, M.; 2005). Mateosian, R., Nov.-Dec. 2005 84

The Symantec Guide to Home Internet Security (Corry-Murray, A. and Weafer, V.; 2005). Mateosian, R., Nov.-Dec. 2005 84

The World is Flat: A Brief History of the Twenty-First Century (Friedman, L.; 2005). Mateosian, R., May-June 2005 13-15

The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005). Mateosian, R., July-Aug. 2005 80

They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004). Mateosian, R., March-April 2005 7

Thoughtful Interaction Design - A Design Perspective on Information Technology (Lowgren, J. and Stolterman, E.; 2005). Mateosian, R., March-April 2005 7

Working Effectively With Legacy Code (Feathers, M.; 2005). Mateosian, R., Jan.-Feb. 2005 99

Brain;
see Brain models
Brain models

book review; Mind Hacks: Tips and Tools for Using Your Brain (Stafford, T. and Webb, M.; 2004). Mateosian, R., Jan.-Feb. 2005 99

Business communication

book review; Fearless Change: Patterns for Introducing New Ideas (Manns, M.L. and Rising, L.; 2004). Mateosian, R., Jan.-Feb. 2005 98-99

C
Cache memories

data cache prefetching, global hist. buffer. Nesbit, K.J., +, Jan.-Feb. 2005 90-97

GeForce 6800. Montrym, J., +, March-April 2005 41-51

high-perform. throughput comput.. Chaudhry, S., +, May-June 2005 32-45

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

low-power cache memories, dyn. zero-sensitivity scheme. Yen-Jen Chang, +, July-Aug. 2005 20-32

montecito, dual-core, dual-thread Itanium processor. McNairy, C., +, March-April 2005 10-20

niagara, 32-way multithreaded Sparc processor. Kongetira, P., +, March-April 2005 21-29

Opteron systs., horus, large-scale symmetric multiprocessing. Rajesh Kota, +, March-April 2005 30-40

reduce processor power consumption, look-ahead archit. adaptation. Zhichun Zhu, +, July-Aug. 2005 10-19

Cell processors

cell processors low-power design methodology. Stasiak, D., +, Nov.-Dec. 2005 71-78

Chip-scale packaging

Hot Chips 16 Conference (special section). March-April 2005 8-69

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

Chip multiprocessors

power efficient error tolerance in chip multiprocessors. Rashid, M.W., +, Nov.-Dec. 2005 60-70

Communication standards

standardization skullduggery update, UMTS std.. Stern, R.H., July-Aug. 2005 73-76

Communication switching

advanced switching interconnects, localized congestion control. Krishnan, V., +, Jan.-Feb. 2005 10-11

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

Communication system routing

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

TCAM-based IP forwarding engine, prefix segreg. scheme. Akhbarizadeh, M.J., +, July-Aug. 2005 48-63

Communication system traffic

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

real-time worm detect., hardware-accelerated syst.. Madhusudan, B., +, Jan.-Feb. 2005 60-69

Complexity theory

MP3 optim. exploiting processor archit. and better algms.. Anguita, M., +, May-June 2005 81-92

Computer architecture

energy awareness and uncertainty in design at microarchitecture level. Marculescu, D., +, Sept.-Oct. 2005 64-76

general-purpose CPUs, accelerating next-gener. public-key cryptosystems. Eberle, H., +, March-April 2005 52-59

high-perform. throughput comput.. Chaudhry, S., +, May-June 2005 32-45

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

montecito, dual-core, dual-thread Itanium processor. McNairy, C., +, March-April 2005 10-20

MP3 optim. exploiting processor archit. and better algms.. Anguita, M., +, May-June 2005 81-92

next decade, computer archit., challenges and opportunities. Agerwala, T., +, May-June 2005 58-69

Opteron systs., horus, large-scale symmetric multiprocessing. Rajesh Kota, +, March-April 2005 30-40

QSNET II, defining high-perform. net. design. Beecroft, J., +, July-Aug. 2005 34-47

road ahead, microprocessor design issues, thoughts. Flynn, M.J., +, May-June 2005 16-31

Computer architecture;
see Memory architecture; Parallel architectures; Reduced instruction set computing
Computer crime

spyware and PC hijacking, not true lies, FTC cracks down. Stern, R.H., Jan.-Feb. 2005 6-7, 100-1

Computer fault tolerance

embedded environments, thread-based virtual duplex systs.. Keller, J., +, March-April 2005 60-69

Computer graphics

GeForce 6800. Montrym, J., +, March-April 2005 41-51

Computer graphics;
see Rendering (computer graphics)
Computer industry

Greenstein, S., Jan.-Feb. 2005commercial technol. markets, Explorers and expanders, both early and late. Greenstein, S., July-Aug. 2005 77-79

Computer instructions

general-purpose CPUs, accelerating next-gener. public-key cryptosystems. Eberle, H., +, March-April 2005 52-59

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

montecito, dual-core, dual-thread Itanium processor. McNairy, C., +, March-April 2005 10-20

niagara, 32-way multithreaded Sparc processor. Kongetira, P., +, March-April 2005 21-29

Computer interfaces

power conscious design of the synergistic processor element of a cell processor. Takahashi, O., +, Sept.-Oct. 2005 10-18

Computer network management

real-time worm detect., hardware-accelerated syst.. Madhusudan, B., +, Jan.-Feb. 2005 60-69

Computer network reliability

advances and novel avenues in hardware-level reliability support. Iyer, R.K., +, Nov-Dec 2005 18-19

reliability banking improves thermal management. Zhijian Lu, +, Nov-Dec 2005 40-49

reliable system design in the presence of transistor variability and degradation. Borkar, S., Nov-Dec 2005 10-16

TRUSS, reliable, scalable server architecture. Gold, B.T., +, Nov-Dec 2005 51-59

Computer networks;
see Computer network management; Computer network reliability
Computers

book review; Revolution in the Valley - The Insanely Great Story of How the Mac Was Made (Hertzfeld, A.; 2004). Mateosian, R., March-April 2005 6-7

Computer software

real-time software platform for cell processor. Maeda, S., +, Sept.-Oct. 2005 20-29

Contracts

IEEE stds. and RAND licensing, std.-setting machine, antitrust ghost. Stern, R.H., May-June 2005 7-9

Cryptography;
see Public key cryptography
D
Database management systems;
see Relational databases
Database theory

book review; Database in Depth: Relational Theory for Practitioners (Date, C.J.; 2005). Mateosian, R., July-Aug. 2005 80, 79

Data buses

high-speed opt. interconnect for scalable shared-memory multiprocessors, design. Avinash Karanth Kodi, +, Jan.-Feb. 2005 41-49

Data compression

MP3 optim. exploiting processor archit. and better algms.. Anguita, M., +, May-June 2005 81-92

Data handling;
see Table lookup
Decoding

MP3 optim. exploiting processor archit. and better algms.. Anguita, M., +, May-June 2005 81-92

Design engineering

book review; Thoughtful Interaction Design - A Design Perspective on Information Technology (Lowgren, J. and Stolterman, E.; 2005). Mateosian, R., March-April 2005 7

Design engineering;
see Product development
Digital communication

Hot Chips 16 Conference (special section). March-April 2005 8-69

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

Digital computers;
see Microcomputers; Parallel machines
Digital integrated circuits;
see Microprocessor chips
Digital storage;
see Random-access storage
Digital systems;
see Digital communication
Distributed processing;
see Message passing; Parallel processing; Pipeline processing
Dynamic programming

long-term workload phases, duration predictions and applications to DVFS. Isci, C., +, Sept.-Oct. 2005 39-51

E
Economic forecasting

book review; The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005). Mateosian, R., July-Aug. 2005 80

Electrical markets

wireless access and electrical markets: Becoming similar? Nov.-Dec. 2005 6-7

Electron device manufacture;
see Integrated circuit manufacture; Semiconductor device manufacture
Electronic engineering;
see Low-power electronics
Encoding;
see Audio coding
Energy management systems;
see Load management
Engineering

book review; They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004). Mateosian, R., March-April 2005 7

Engineering;
see Design engineering
Error analysis

experiment study of soft errors in microprocessors. Saggese, G.P., +, Nov-Dec 2005 30-39

power efficient error tolerance in chip multiprocessors. Rashid, M.W., +, Nov.-Dec. 2005 60-70

Error tolerance

power efficient error tolerance in chip multiprocessors. Rashid, M.W., +, Nov.-Dec. 2005 60-70

advances and novel avenues in hardware-level reliability support. Iyer, R.K., +, Nov-Dec 2005 18-19

F
Fault diagnosis

advances and novel avenues in hardware-level reliability support. Iyer, R.K., +, Nov-Dec 2005 18-19

embedded environments, thread-based virtual duplex systs.. Keller, J., +, March-April 2005 60-69

Field programmable gate arrays

real-time worm detect., hardware-accelerated syst.. Madhusudan, B., +, Jan.-Feb. 2005 60-69

G
Globalization

book review; The World is Flat: A Brief History of the Twenty-First Century (Friedman, L.; 2005). Mateosian, R., May-June 2005 13-15

book review; The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005). Mateosian, R., July-Aug. 2005 80

H
High level languages;
see Object-oriented languages
High-speed techniques

Hot Interconnects 12 (special section). Jan.-Feb. 2005 8-97

Hot Interconnects 12 (special section intro.). Sterbenz, J.P.G., +, Jan.-Feb. 2005 8-9

I
IEEE standards

stds. and RAND licensing, std.-setting machine, antitrust ghost. Stern, R.H., May-June 2005 7-9

Image processing;
see Image resolution
Image resolution

GeForce 6800. Montrym, J., +, March-April 2005 41-51

Industrial property;
see Patents
Information networks;
see Internet
Information technology

book review; Thoughtful Interaction Design - A Design Perspective on Information Technology (Lowgren, J. and Stolterman, E.; 2005. Mateosian, R., March-April 2005 7

Information theory;
see Decoding; Prediction theory
Innovation management

book review; The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005). Mateosian, R., July-Aug. 2005 80

book review; They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004). Mateosian, R., March-April 2005 7

communications consolidation after an era of no restraints. Greenstein, S., March-April 2005 72, 70-71

Integrated circuit design

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

road ahead, microprocessor design issues, thoughts. Flynn, M.J., +, May-June 2005 16-31

Integrated circuit manufacture

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

standardization skullduggery update, UMTS std.. Stern, R.H., July-Aug. 2005 73-76

Integrated memory circuits;
see SRAM chips
Interactive systems

GeForce 6800. Montrym, J., +, March-April 2005 41-51

Interconnected systems

Hot Interconnects 12 (special section). Jan.-Feb. 2005 8-97

Hot Interconnects 12 (special section intro.). Sterbenz, J.P.G., +, Jan.-Feb. 2005 8-9

Interconnections;
see Optical interconnections
Internet

book review; A Semantic Web Primer (Antoniou, G. and van Harmelen, F.; 2004). Mateosian, R., Jan.-Feb. 2005 99

commercial technol. markets, Explorers and expanders, both early and late. Greenstein, S., July-Aug. 2005 77-79

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

real-time worm detect., hardware-accelerated syst.. Madhusudan, B., +, Jan.-Feb. 2005 60-69

spyware and PC hijacking, not true lies, FTC cracks down. Stern, R.H., Jan.-Feb. 2005 6-7, 100-1

TCAM-based IP forwarding engine, prefix segreg. scheme. Akhbarizadeh, M.J., +, July-Aug. 2005 48-63

L
Large-scale systems;
see Interconnected systems
Layout

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

Legal factors

patentable. Emma, P.G., July-Aug. 2005 7-9

spyware and PC hijacking, not true lies, FTC cracks down. Stern, R.H., Jan.-Feb. 2005 6-7, 100-1

standardization skullduggery update, UMTS std.. Stern, R.H., July-Aug. 2005 73-76

Load (electric);
see Load management
Load management

long-term workload phases, duration predictions and applications to DVFS. Isci, C., +, Sept.-Oct. 2005 39-51

Logic;
see Logic design
Logic design

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

road ahead, microprocessor design issues, thoughts. Flynn, M.J., +, May-June 2005 16-31

Low-power design

cell processor low-power design methodology. Stasiak, D., +, Nov.-Dec. 2005 71-78

Low-power electronics

low-power design approach of 11FO4 256-Kbyte embedded SRAM for the synergistic processor element of a cell processor. Asano, T., +, Sept.-Oct. 2005 30-38

M
Management

communications consolidation after an era of no restraints. Greenstein, S., March-April 2005 72, 70-71

formal control techniques for power-performance management in high performance. Qiang Wu, +, Sept.-Oct. 2005 52-62

Management;
see Contracts
Mathematical programming;
see Dynamic programming
Meetings

Hot Chips 16 Conference (special section). March-April 2005 8-69

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

Hot Interconnects 12 (special section). Jan.-Feb. 2005 8-97

Hot Interconnects 12 (special section intro.). Sterbenz, J.P.G., +, Jan.-Feb. 2005 8-9

Memory architecture

data cache prefetching, global hist. buffer. Nesbit, K.J., +, Jan.-Feb. 2005 90-97

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

Memory management

better branch predict., prophet/critic hybrids. Falcon, A., +, Jan.-Feb. 2005 80-89

Message passing

evaluating InfiniBand perform., PCI Express. Jiuxing Liu, +, Jan.-Feb. 2005 20-29

Microcomputers

computer market, Not a mellifluous march to maturity. Greenstein, S., Jan.-Feb. 2005 104, 102-103

Microprocessor chips

experiment study of soft errors in microprocessors. Saggese, G.P., +, Nov-Dec 2005 30-39

formal control techniques for power-performance management in high performance. Qiang Wu, +, Sept.-Oct. 2005 52-62

Microprocessors

designing microprocessors with robust functionality and performance. P. Bose, Nov.-Dec. 2005 5

high-perform. throughput comput.. Chaudhry, S., +, May-June 2005 32-45

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

low-power cache memories, dyn. zero-sensitivity scheme. Yen-Jen Chang, +, July-Aug. 2005 20-32

montecito, dual-core, dual-thread Itanium processor. McNairy, C., +, March-April 2005 10-20

MP3 optim. exploiting processor archit. and better algms.. Anguita, M., +, May-June 2005 81-92

next decade, computer archit., challenges and opportunities. Agerwala, T., +, May-June 2005 58-69

road ahead, microprocessor design issues, thoughts. Flynn, M.J., +, May-June 2005 16-31

Microprogramming

reduce processor power consumption, look-ahead archit. adaptation. Zhichun Zhu, +, July-Aug. 2005 10-19

Multiprocessing

embedded environments, thread-based virtual duplex systs.. Keller, J., +, March-April 2005 60-69

next decade, computer archit., challenges and opportunities. Agerwala, T., +, May-June 2005 58-69

niagara, 32-way multithreaded Sparc processor. Kongetira, P., +, March-April 2005 21-29

Opteron systs., horus, large-scale symmetric multiprocessing. Rajesh Kota, +, March-April 2005 30-40

QSNET II, defining high-perform. net. design. Beecroft, J., +, July-Aug. 2005 34-47

Multiprocessor interconnection

Cray X1 distrib. shared-memory archit., perform. eval.. Dunigan, T.H., Jr., +, Jan.-Feb. 2005 30-40

high-speed opt. interconnect for scalable shared-memory multiprocessors, design. Avinash Karanth Kodi, +, Jan.-Feb. 2005 41-49

Opteron systs., horus, large-scale symmetric multiprocessing. Rajesh Kota, +, March-April 2005 30-40

power-efficient error tolerance in chip multiprocessors. Rashid, M.W., +, Nov.-Dec. 2005 60-70

QSNET II, defining high-perform. net. design. Beecroft, J., +, July-Aug. 2005 34-47

N
Network routing

Hot Interconnects 12 (special section). Jan.-Feb. 2005 8-97

Hot Interconnects 12 (special section intro.). Sterbenz, J.P.G., +, Jan.-Feb. 2005 8-9

Network servers

TRUSS, reliable, scalable server architecture. Gold, B.T., +, Nov-Dec 2005 51-59

Network synthesis;
see Integrated circuit design
Neurophysiology

book review; Mind Hacks: Tips and Tools for Using Your Brain (Stafford, T. and Webb, M.; 2004). Mateosian, R., Jan.-Feb. 2005 99

Numerical analysis;
see Error analysis
O
Object-oriented languages

book review; Head First Design Patterns (Freeman, E. and Freeman, E.; 2004). Mateosian, R., Jan.-Feb. 2005 98

book review; Refactoring to Patterns (Kerievsky, J.; 2004). Mateosian, R., Jan.-Feb. 2005 98

Optical interconnections

high-speed opt. interconnect for scalable shared-memory multiprocessors, design. Avinash Karanth Kodi, +, Jan.-Feb. 2005 41-49

Optical resolving power;
see Image resolution
Optical switches

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

Optimization methods

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

P
Packet switching

advanced switching interconnects, localized congestion control. Krishnan, V., +, Jan.-Feb. 2005 10-11

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

efficient multimatch packet class. and lookup, TCAM. Yu, F., +, Jan.-Feb. 2005 50-59

TCAM-based IP forwarding engine, prefix segreg. scheme. Akhbarizadeh, M.J., +, July-Aug. 2005 48-63

Parallel architectures

better branch predict., prophet/critic hybrids. Falcon, A., +, Jan.-Feb. 2005 80-89

Cray X1 distrib. shared-memory archit., perform. eval.. Dunigan, T.H., Jr., +, Jan.-Feb. 2005 30-40

GeForce 6800. Montrym, J., +, March-April 2005 41-51

high-speed opt. interconnect for scalable shared-memory multiprocessors, design. Avinash Karanth Kodi, +, Jan.-Feb. 2005 41-49

niagara, 32-way multithreaded Sparc processor. Kongetira, P., +, March-April 2005 21-29

Parallel machines

Cray X1 distrib. shared-memory archit., perform. eval.. Dunigan, T.H., Jr., +, Jan.-Feb. 2005 30-40

Parallel processing

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

power conscious design of the synergistic processor element of a cell processor. Takahashi, O., +, Sept.-Oct. 2005 10-18

QSNET II, defining high-perform. net. design. Beecroft, J., +, July-Aug. 2005 34-47

Parallel processing;
see Parallel architectures; Parallel machines
Patents

IEEE stds. and RAND licensing, std.-setting machine, antitrust ghost. Stern, R.H., May-June 2005 7-9

inventions and creative proc.. Emma, P.G., May-June 2005 96, 93-95

patentable. Emma, P.G., July-Aug. 2005 7-9

standardization skullduggery update, UMTS std.. Stern, R.H., July-Aug. 2005 73-76

transnational electronic systems and patent infringement, Stern, R.H., Nov.-Dec. 2005, 85-88

writing the claims for a patent. Emma, P.G., Nov.-Dec. 2005 79-81

Performance evaluation

energy awareness and uncertainty in design at microarchitecture level. Marculescu, D., +, Sept.-Oct. 2005 64-76

experiment study of soft errors in microprocessors. Saggese, G.P., +, Nov-Dec 2005 30-39

formal control techniques for power-performance management in high performance. Qiang Wu, +, Sept.-Oct. 2005 52-62

reliable system design in the presence of transistor variability and degradation. Borkar, S., Nov-Dec 2005 10-16

Personnel

computer market, Not a mellifluous march to maturity. Greenstein, S., Jan.-Feb. 2005 104, 102-103

Physiological models;
see Brain models
Physiology;
see Neurophysiology
Pipeline processing

kilo-instruction processors, overcoming memory wall. Cristal, A., +, May-June 2005 48-57

montecito, dual-core, dual-thread Itanium processor. McNairy, C., +, March-April 2005 10-20

niagara, 32-way multithreaded Sparc processor. Kongetira, P., +, March-April 2005 21-29

reduce processor power consumption, look-ahead archit. adaptation. Zhichun Zhu, +, July-Aug. 2005 10-19

Power consumption

energy awareness and uncertainty in design at microarchitecture level. Marculescu, D., +, Sept.-Oct. 2005 64-76

formal control techniques for power-performance management in high performance. Qiang Wu, +, Sept.-Oct. 2005 52-62

Power demand

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

low-power cache memories, dyn. zero-sensitivity scheme. Yen-Jen Chang, +, July-Aug. 2005 20-32

next decade, computer archit., challenges and opportunities. Agerwala, T., +, May-June 2005 58-69

reduce processor power consumption, look-ahead archit. adaptation. Zhichun Zhu, +, July-Aug. 2005 10-19

Prediction theory

long-term workload phases, duration predictions and applications to DVFS. Isci, C., +, Sept.-Oct. 2005 39-51

Product design

book review; Revolution in the Valley - The Insanely Great Story of How the Mac Was Made (Hertzfeld, A.; 2004). Mateosian, R., March-April 2005 6-7

Product development

book review; Revolution in the Valley - The Insanely Great Story of How the Mac Was Made (Hertzfeld, A.; 2004). Mateosian, R., March-April 2005 6-7

Professional aspects

book review; They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004). Mateosian, R., March-April 2005 7

Programmable logic arrays;
see Field programmable gate arrays
Programming

book review; Fearless Change: Patterns for Introducing New Ideas (Manns, M.L. and Rising, L.; 2004). Mateosian, R., Jan.-Feb. 2005 98-99

book review; Head First Design Patterns (Freeman, E. and Freeman, E.; 2004). Mateosian, R., Jan.-Feb. 2005 98

book review; Refactoring to Patterns (Kerievsky, J.; 2004). Mateosian, R., Jan.-Feb. 2005 98

book review; Software Endgames: Eliminating Defects, Controlling Change, and the Countdown to On-Time Delivery (Galen, R.; 2005). Mateosian, R., Jan.-Feb. 2005 99

Programming;
see Microprogramming
Program processors

low-power design approach of 11FO4 256-Kbyte embedded SRAM for the synergistic processor element of a cell processor. Asano, T., +, Sept.-Oct. 2005 30-38

power conscious design of the synergistic processor element of a cell processor. Takahashi, O., +, Sept.-Oct. 2005 10-18

real-time software platform for cell processor. Maeda, S., +, Sept.-Oct. 2005 20-29

Public key cryptography

general-purpose CPUs, accelerating next-gener. public-key cryptosystems. Eberle, H., +, March-April 2005 52-59

Hot Chips 16 Conference (special section). March-April 2005 8-69

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

R
Random-access storage

low-power design approach of 11FO4 256-Kbyte embedded SRAM for the synergistic processor element of a cell processor. Asano, T., +, Sept.-Oct. 2005 30-38

Random-access storage;
see SRAM chips
Real-time systems

real-time software platform for cell processor. Maeda, S., +, Sept.-Oct. 2005 20-29

worm detect., hardware-accelerated syst.. Madhusudan, B., +, Jan.-Feb. 2005 60-69

Reduced instruction set computing

reduce processor power consumption, look-ahead archit. adaptation. Zhichun Zhu, +, July-Aug. 2005 10-19

Relational databases

book review; Database in Depth: Relational Theory for Practitioners (Date, C.J.; 2005). Mateosian, R., July-Aug. 2005 80, 79

Reliability

designing reliable systems from unreliable components: the challenges of transistor variability and degradation. Borkar, S., Nov.-Dec. 2005 10-16

improved thermal management with reliability banking, Zhijian Lu, +, Nov.-Dec. 2005 40-49

reliability-aware microarchitecture. Adve, S.V., +, Nov.-Dec. 2005 8-9

TRUSS: a reliable, scalable server architecture, Gold, B.T., +, Nov.-Dec. 2005, 51-59

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

recent advances and new avenues in hardware-level reliability support, Ravishankar, K.I., +, Nov.-Dec. 2005, 18-29

Rendering (computer graphics)

GeForce 6800. Montrym, J., +, March-April 2005 41-51

Research and development

book review; They Made America - From the Steam Engine to the Search Engine: Two Centuries of Innovation (Evans, H.; 2004). Mateosian, R., March-April 2005 7

Research and development management;
see Innovation management
Resource management

configure, load-balanced switch, hardware. Srikanth Arekapudi, +, Jan.-Feb. 2005 70-78

Risk analysis

foresight mgt., The anatomy of foresight traps. Greenstein, S., May-June 2005 10-12

S
Security of data;
see Computer crime
Semantic Web

book review; A Semantic Web Primer (Antoniou, G. and van Harmelen, F.; 2004). Mateosian, R., Jan.-Feb. 2005 99

Semiconductor device manufacture

standardization skullduggery update, UMTS std.. Stern, R.H., July-Aug. 2005 73-76

Signal processing;
see Data compression
Signal resolution;
see Image resolution
Soft errors

an experimental study of soft errors in microprocessors; Saggese, G.P., +, Nov-Dec 2005 30-39

book review; Fearless Change: Patterns for Introducing New Ideas (Manns, M.L. and Rising, L.; 2004). Mateosian, R., Jan.-Feb. 2005 98-99

Software development management

book review; Fearless Change: Patterns for Introducing New Ideas (Manns, M.L. and Rising, L.; 2004). Mateosian, R., Jan.-Feb. 2005 98-99

book review; Mind Hacks: Tips and Tools for Using Your Brain (Stafford, T. and Webb, M.; 2004). Mateosian, R., Jan.-Feb. 2005 99

book review; Software Endgames: Eliminating Defects, Controlling Change, and the Countdown to On-Time Delivery (Galen, R.; 2005). Mateosian, R., Jan.-Feb. 2005 99

book review; Working Effectively with Legacy Code (Feathers, M.; 2005). Mateosian, R., Jan.-Feb. 2005 99

Software engineering

book review; Head First Design Patterns (Freeman, E. and Freeman, E.; 2004). Mateosian, R., Jan.-Feb. 2005 98

book review; Refactoring to Patterns (Kerievsky, J.; 2004). Mateosian, R., Jan.-Feb. 2005 98

book review; Software Endgames: Eliminating Defects, Controlling Change, and the Countdown to On-Time Delivery (Galen, R.; 2005). Mateosian, R., Jan.-Feb. 2005 99

book review; Working Effectively with Legacy Code (Feathers, M.; 2005). Mateosian, R., Jan.-Feb. 2005 99

Software engineering;
see Software development management
Software management;
see Software development management
Special issues and sections

Hot Chips 16 Conference (special section). March-April 2005 8-69

Hot Chips 16 Conference (special section). Dally, B., +, March-April 2005 8-9

Hot Interconnects 12 (special section). Jan.-Feb. 2005 8-97

Hot Interconnects 12 (special section intro.). Sterbenz, J.P.G., +, Jan.-Feb. 2005 8-9

SRAM chips

low-power cache memories, dyn. zero-sensitivity scheme. Yen-Jen Chang, +, July-Aug. 2005 20-32

low-power design approach of 11FO4 256-Kbyte embedded SRAM for the synergistic processor element of a cell processor. Asano, T., +, Sept.-Oct. 2005 30-38

Standardization

IEEE stds. and RAND licensing, std.-setting machine, antitrust ghost. Stern, R.H., May-June 2005 7-9

Standards

lifetime reliab., architectural soln.. Jayanth Srinivasan, +, May-June 2005 70-80

Standards;
see IEEE standards
Switches;
see Optical switches
System recovery

embedded environments, thread-based virtual duplex systs. Keller, J., +, March-April 2005 60-69

Systems software;
see Program processors
T
Table lookup

bursty access patterns, power-efficient TCAMs. Weidong Wu, +, July-Aug. 2005 64-72

data cache prefetching, global hist. buffer. Nesbit, K.J., +, Jan.-Feb. 2005 90-97

Technological forecasting

book review; The World is Flat: A Brief History of the Twenty-First Century (Friedman, T.; 2005). Mateosian, R., July-Aug. 2005 80

Technology forecasting

next decade, computer archit., challenges and opportunities. Agerwala, T., +, May-June 2005 58-69

Telecommunication;
see Business communication; Digital communication; Telecommunication services
Telecommunication network management;
see Computer network management
Telecommunication network reliability;
see Computer network reliability
Telecommunication services

communications consolidation after an era of no restraints. Greenstein, S., March-April 2005 72, 70-71

Thermal analysis

improved thermal management with reliability banking. Zhijian Lu, +, Nov-Dec 2005 40-49

reliability banking improves thermal management. Zhijian Lu, +, Nov-Dec 2005 40-49

Time division multiplexing;
see Packet switching
Traffic control (communication)

advanced switching interconnects, localized congestion control. Krishnan, V., +, Jan.-Feb. 2005 10-11

Transistors

designing reliable systems from unreliable components: the challenges of transistor variability and degradation. Borkar, S., Nov.-Dec. 2005 10-16

power conscious design of the synergistic processor element of a cell processor. Takahashi, O., +, Sept.-Oct. 2005 10-18

reliable system design in the presence of transistor variability and degradation. Borkar, S., Nov-Dec 2005 10-16

TRUSS

TRUSS: A reliable, scalable server architecture. Gold, B.T., +, Nov-Dec 2005 51-59

U

designing reliable systems from unreliable components: The challenges of transistor variability and degradation. Borkar, S., Nov.-Dec. 2005 10-16

V
Vector processing

Cray X1 distrib. shared-memory archit., perform. eval.. Dunigan, T.H., Jr., +, Jan.-Feb. 2005 30-40

Virtual computers

embedded environments, thread-based virtual duplex systs.. Keller, J., +, March-April 2005 60-69

W
Wireless

wireless access and electrical markets: Becoming similar? Nov.-Dec. 2005 6-7