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Transient-Fault Recovery for Chip Multiprocessors
November/December 2003 (vol. 23 no. 6)
pp. 76-83
Mohamed A. Gomaa, Purdue University
Chad Scarbrough, Purdue University
T. N. Vijaykumar, Purdue University
Irith Pomeranz, Purdue University

Chip-level redundant threading with recovery (CRTR) for chip multiprocessors extends previous transient-fault detection schemes to provide fault recovery. To hide interprocessor latency, CRTR uses a long slack enabled by asymmetric commit and uses the trailing thread state for recovery. CRTR increases bandwidth supply by pipelining communication paths and reduces bandwidth demand by extending the dependence-based checking elision.

Citation:
Mohamed A. Gomaa, Chad Scarbrough, T. N. Vijaykumar, Irith Pomeranz, "Transient-Fault Recovery for Chip Multiprocessors," IEEE Micro, vol. 23, no. 6, pp. 76-83, Nov.-Dec. 2003, doi:10.1109/MM.2003.1261390
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