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Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor
November/December 2003 (vol. 23 no. 6)
pp. 62-68
Greg Semeraro, Rochester Institute of Technology
David H. Albonesi, University of Rochester
Steven G. Dropsho, University of Rochester
Sandhya Dwarkadas, University of Rochester
Michael L. Scott, University of Rochester

Multiple clock domains is one solution to the increasing problem of propagating the clock signal across increasingly larger and faster chips. The ability to independently scale frequency and voltage in each domain creates a powerful means of reducing power dissipation.

Citation:
Grigorios Magklis, Greg Semeraro, David H. Albonesi, Steven G. Dropsho, Sandhya Dwarkadas, Michael L. Scott, "Dynamic Frequency and Voltage Scaling for a Multiple-Clock-Domain Microprocessor," IEEE Micro, vol. 23, no. 6, pp. 62-68, Nov.-Dec. 2003, doi:10.1109/MM.2003.1261388
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