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Issue No.06 - November/December (2003 vol.23)
pp: 46-51
K. Sankaralingam , Texas Univ., Austin, TX, USA
R. Nagarajan , Texas Univ., Austin, TX, USA
Haiming Liu , Texas Univ., Austin, TX, USA
Changkyu Kim , Texas Univ., Austin, TX, USA
Jaehyuk Huh , Texas Univ., Austin, TX, USA
D. Burger , Texas Univ., Austin, TX, USA
S.W. Keckler , Texas Univ., Austin, TX, USA
C. Moore , Texas Univ., Austin, TX, USA
ABSTRACT
The Tera-op reliable intelligently adaptive processing system (TRIPS) architecture seeks to deliver system-level configurability to applications and runtime systems. It does so by employing the concept of polymorphism, which permits the runtime system to configure the hardware execution resources to match the mode of execution and demands of the compiler and application.
INDEX TERMS
program compilers, parallel architectures,polymorphous TRIPS architecture, TRIPS architecture, system-level configurability, runtime systems, polymorphism, compiler, Tera-op reliable intelligently adaptive processing system, ILP, TLP, DLP,Parallel processing, Computer architecture, Registers, Logic arrays, Systolic arrays, Network servers, Graphics, Digital signal processors, Computer applications
CITATION
K. Sankaralingam, R. Nagarajan, Haiming Liu, Changkyu Kim, Jaehyuk Huh, D. Burger, S.W. Keckler, C. Moore, "Exploiting ILP, TLP, and DLP with the polymorphous trips architecture", IEEE Micro, vol.23, no. 6, pp. 46-51, November/December 2003, doi:10.1109/MM.2003.1261386
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