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Issue No.05 - September/October (2003 vol.23)
pp: 40-49
Nathalie Julien , Lester Laboratory, University of South Brittany
Johann Laurent , Lester Laboratory, University of South Brittany
Eric Senn , Lester Laboratory, University of South Brittany
Eric Martin , Lester Laboratory, University of South Brittany
ABSTRACT
<p>This new approach characterizes power dissipation on complex DSPs. Its processor model relies on an initial functional-level power analysis of the target processor together with a characterization that qualifies the more significant architectural and algorithmic parameters for power dissipation. These parameters come from a simple profiling of the assembly code. This functional model accounts for deeply pipelined, superscalar, and hierarchical memory architectures.</p>
CITATION
Nathalie Julien, Johann Laurent, Eric Senn, Eric Martin, "Power Consumption Modeling and Characterization of the TI C6201", IEEE Micro, vol.23, no. 5, pp. 40-49, September/October 2003, doi:10.1109/MM.2003.1240211
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