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The 82460GX Sever/Workstation Chip Set
November/December 2000 (vol. 20 no. 6)
pp. 69-75
ASCII Text
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Eric Dahlen, Jennifer Gustin, Susan Meredith, Doug Moran, "The 82460GX Sever/Workstation Chip Set," IEEE Micro, vol. 20, no. 6, pp. 69-75, November/December, 2000.
 
 
BibTex
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@article{ 10.1109/40.888705,
author = {Eric Dahlen and Jennifer Gustin and Susan Meredith and Doug Moran},
title = {The 82460GX Sever/Workstation Chip Set},
journal ={IEEE Micro},
volume = {20},
number = {6},
issn = {0272-1732},
year = {2000},
pages = {69-75},
doi = {http://doi.ieeecomputersociety.org/10.1109/40.888705},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - The 82460GX Sever/Workstation Chip Set
IS - 6
SN - 0272-1732
SP69
EP75
EPD - 69-75
A1 - Eric Dahlen,
A1 - Jennifer Gustin,
A1 - Susan Meredith,
A1 - Doug Moran,
PY - 2000
VL - 20
JA - IEEE Micro
ER -
 
This article provides an introduction to the memory, I/O, and graphics subsystems of Intel's Itanium processor chip set and discusses several aspects of the processor bus.
Citation:
Eric Dahlen, Jennifer Gustin, Susan Meredith, Doug Moran, "The 82460GX Sever/Workstation Chip Set," IEEE Micro, vol. 20, no. 6, pp. 69-75, Nov.-Dec. 2000, doi:10.1109/40.888705
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