This Article 
   
 Share 
   
 Bibliographic References 
   
 Add to: 
 
Digg
Furl
Spurl
Blink
Simpy
Google
Del.icio.us
Y!MyWeb
 
 Search 
   
The Stanford Hydra CMP
March/April 2000 (vol. 20 no. 2)
pp. 71-84
ASCII Text
x 
 
Lance Hammond, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, Michael Chen, Kunle Olukotun, "The Stanford Hydra CMP," IEEE Micro, vol. 20, no. 2, pp. 71-84, March/April, 2000.
 
 
BibTex
x
 
@article{ 10.1109/40.848474,
author = {Lance Hammond and Benedict A. Hubbert and Michael Siu and Manohar K. Prabhu and Michael Chen and Kunle Olukotun},
title = {The Stanford Hydra CMP},
journal ={IEEE Micro},
volume = {20},
number = {2},
issn = {0272-1732},
year = {2000},
pages = {71-84},
doi = {http://doi.ieeecomputersociety.org/10.1109/40.848474},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - The Stanford Hydra CMP
IS - 2
SN - 0272-1732
SP71
EP84
EPD - 71-84
A1 - Lance Hammond,
A1 - Benedict A. Hubbert,
A1 - Michael Siu,
A1 - Manohar K. Prabhu,
A1 - Michael Chen,
A1 - Kunle Olukotun,
PY - 2000
VL - 20
JA - IEEE Micro
ER -
 
Chip multiprocessors offer an economical, scalable architecture for future microprocessors. Thread-level speculation support allows them to speed up past software.
Citation:
Lance Hammond, Benedict A. Hubbert, Michael Siu, Manohar K. Prabhu, Michael Chen, Kunle Olukotun, "The Stanford Hydra CMP," IEEE Micro, vol. 20, no. 2, pp. 71-84, March-April 2000, doi:10.1109/40.848474
Usage of this product signifies your acceptance of the Terms of Use.