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Issue No.04 - July/August (1999 vol.19)
pp: 56-65
ABSTRACT
This article demonstrates the flexibility and usefulness of SuperENC, an architecture for a single-chip MPEG-2 video encoder. The architecture, based on three-layer cooperation, provides flexible data transfer that improves the encoder's versatility, scalability, and video quality. The LSI chip was successfully fabricated in the 0.25-micron, four-metal CMOS process. Its small size and low power consumption make it ideal for a wide range of applications, such as DVD recorders, PC card encoders, and HDTV encoders.
CITATION
Mitsuo Ikeda, Toshio Kondo, Koyo Nitta, Kazuhito Suguri, Takeshi Yoshitome, Toshihiro Minami, Hiroe Iwasaki, Katsuyuki Ochiai, Jiro Naganuma, Makoto Endo, Yutaka Tashiro, Hiroshi Watanabe, Naoki Kobayashi, Tsuneo Okubo, Takeshi Ogura, Ryota Kasai, "SuperENC: MPEG-2 Video Encoder Chip", IEEE Micro, vol.19, no. 4, pp. 56-65, July/August 1999, doi:10.1109/40.782568
REFERENCES
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6. K. Ochiai et al., "High-Speed Software-Based Platform for Embedded Software of a Single-Chip MPEG-2 Video Encoder LSI with HDTV Scalability," Proc. Design, Automation, and Test in Europe Conf., IEEE Computer Soc. Press, 1999, pp. 303-308.
7. K. Nitta et al., "Motion Estimation/Motion Compensation Hardware Architecture for a Scene-Adaptive Algorithm on a Single-Chip MPEG2 MP@ML Video Encoder," Proc. IS&T/SPIE Conf. Visual Communications and Image Processing, Vol. 3,653, Soc. of Photo-Optical Instrumentation Engineers, (SPIE) Bellingham, Wash., 1999, pp. 874-882.
8. K. Suguri et al., "A Scalable Architecture of Real-Time MP@HL MPEG-2 Video Encoder for Multi-Resolution Video," Proc. IS&T/SPIE Conf. Visual Communications and Image Processing, Vol. 3,653, SPIE, 1999, pp. 895-904.
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