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Issue No.03 - May/June (1999 vol.19)
pp: 36-46
ABSTRACT
We present a novel use of Term Rewriting Systems (TRS's) to describe micro-architectures. The state of a system is represented as a TRS term while the state transitions are represented as TRS rules. TRS descriptions are amenable to both verification and synthesis. We illustrate the use of TRS's by giving the operational semantics of a simple RISC instruction set. We then present another TRS that implements the same instruction set on a micro-architecture which permits register renaming and speculative execution. The correctness of the speculative implementation is discussed in terms of the ability of the two TRS's to simulate each other. Our method facilitates understanding of important micro-architectural differences without delving into low-level implementation details.
CITATION
Arvind , Xiaowei Shen, "Using Term Rewriting Systems to Design and Verify Processors", IEEE Micro, vol.19, no. 3, pp. 36-46, May/June 1999, doi:10.1109/40.768501
REFERENCES
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10. X. Shen and Arvind, "Design and Verification of Speculative Processors," Proc. Workshop on Formal Techniques for Hardware and Hardware-Like Systems,Marstrand, Sweden, June 1998; also appears as CSG Memo 400B, Laboratory for Computer Science, MIT, Cambridge, Mass., http://www.csg.lcs.mit.edu/pubscsgmemo.html .
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