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| ASCII Text | x | ||
| Bruce Jacob, Trevor Mudge, "Virtual Memory in Contemporary Microprocessors," IEEE Micro, vol. 18, no. 4, pp. 60-75, July/August, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/40.710872, author = {Bruce Jacob and Trevor Mudge}, title = {Virtual Memory in Contemporary Microprocessors}, journal ={IEEE Micro}, volume = {18}, number = {4}, issn = {0272-1732}, year = {1998}, pages = {60-75}, doi = {http://doi.ieeecomputersociety.org/10.1109/40.710872}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Virtual Memory in Contemporary Microprocessors IS - 4 SN - 0272-1732 SP60 EP75 EPD - 60-75 A1 - Bruce Jacob, A1 - Trevor Mudge, PY - 1998 KW - hardware support for virtual memory (VM) KW - memory management units (MMUs) KW - translation lookaside buffers (TLBs) KW - address space protection KW - shared memory KW - page tables KW - commercial microprocessor architectures VL - 18 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.710872
This article presents a survey of commercial memory-management designs and describes how each processor architecture supports the common features of virtual memory, such as address space protection, shared memory, and large address spaces.
Index Terms:
hardware support for virtual memory (VM), memory management units (MMUs), translation lookaside buffers (TLBs), address space protection, shared memory, page tables, commercial microprocessor architectures
Citation:
Bruce Jacob, Trevor Mudge, "Virtual Memory in Contemporary Microprocessors," IEEE Micro, vol. 18, no. 4, pp. 60-75, July-Aug. 1998, doi:10.1109/40.710872
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