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| Tim Litch, Jeff Slaton, "StrongARMing Portable Communications," IEEE Micro, vol. 18, no. 2, pp. 48-55, March/April, 1998. | |||
| BibTex | x | ||
| @article{ 10.1109/40.671402, author = {Tim Litch and Jeff Slaton}, title = {StrongARMing Portable Communications}, journal ={IEEE Micro}, volume = {18}, number = {2}, issn = {0272-1732}, year = {1998}, pages = {48-55}, doi = {http://doi.ieeecomputersociety.org/10.1109/40.671402}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - StrongARMing Portable Communications IS - 2 SN - 0272-1732 SP48 EP55 EPD - 48-55 A1 - Tim Litch, A1 - Jeff Slaton, PY - 1998 KW - microprocessors KW - portables KW - SA-110 KW - handhelds KW - low power VL - 18 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.671402
The StrongARM SA-1100 is an integrated microprocessor designed for use in portable, battery powered applications. Intended for the new breed of handheld devices, such as wallet PCs, smartphones and subnotebooks, the SA-1100 integrates a variety of peripheral functions commonly relegated to ASIC devices onto a single chip. In a die size of 75 mm2, the SA-1100 incorporates the SA-1 core, a 16k Icache, an 8k dcache, a memory controller, PCMCIA support, timers (including a real-time clock), 28 general-purpose I/Os, an interrupt controller, a DMA controller, and clocking and power management controller along with an LCD contoller and eight serial controllers. The SA-1100 delivers an estimated 230 Dhrystone MIPs at 200 MHz and consumes 250 mW in typical operation. During its low-power sleep mode, it draws a maximum of 50 uA.
Index Terms:
microprocessors, portables, SA-110, handhelds, low power
Citation:
Tim Litch, Jeff Slaton, "StrongARMing Portable Communications," IEEE Micro, vol. 18, no. 2, pp. 48-55, March-April 1998, doi:10.1109/40.671402
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