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Issue No.02 - March/April (1998 vol.18)
pp: 36-47
ABSTRACT
The construction of real multimedia systems based on processors instead of special purpose hardware requires both higher signal processing performance and higher bandwidth memory systems to the processor. For these applications, a 32-bit embedded RISC processor with a 64-bit "single-instruction multiple-data (SIMD)" coprocessor, the V830R/AV, has been developed. Its asymmetric dual-issue superscalar architecture with the 64-bit SIMD coprocessor achieves 2-GOPS performance in video signal processing applications. The 200-MHz V830R/AV incorporates a Concurrent Rambus DRAM interface that has a 600-Mbyte/s data transfer rate, and it also integrates several multimedia-oriented peripherals. This results in a processor-based real-time MPEG-2 MP@ML decoding system in a unified memory architecture environment.
INDEX TERMS
multimedia, processors, signal processing, RISC, memory architecture
CITATION
Kazumasa Suzuki, Tomohisa Arai, Kouhei Nadehara, Ichiro Kuroda, "V830R/AV: Embedded Multimedia Superscalar RISC Processor", IEEE Micro, vol.18, no. 2, pp. 36-47, March/April 1998, doi:10.1109/40.671401
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