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A Tracking Clock Recovery Receiver for 4-Gbps Signaling
January/February 1998 (vol. 18 no. 1)
pp. 25-27
Results of an experimental 0.5-micron CMOS, 4-Gbps signaling chip show the effectiveness of a simple transition-filter equalization technique. The chip uses a tracking clock recovery receiver, in which a 21-phase clock is servoed to center every other clock on the center of the data "eye."
Index Terms:
High-speed signaling, clock recovery, equalization, interconnections
Citation:
John Poulton, William J. Dally, Steve Tell, "A Tracking Clock Recovery Receiver for 4-Gbps Signaling," IEEE Micro, vol. 18, no. 1, pp. 25-27, Jan.-Feb. 1998, doi:10.1109/40.653023
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