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Limited Bandwidth to Affect Processor Design
November/December 1997 (vol. 17 no. 6)
pp. 55-62
In this article, we discuss how the effects of long memory latencies and increased memory bandwidth requirements may affect the design of modern microprocessors and their memory systems. In particular, we examine the subtle trade-offs between memory latency and bandwidth. Through execution-driven simulation, we measure the fraction of time that several SPEC95 benchmarks spend computing, stalled for memory latency, and stalled for limited memory bandwidth. Our results show that as processors implement more aggressive latency tolerance techniques, limited memory bandwidth negatively impacts programs much more than do long memory latencies. Finally, we survey a range of strategies for mitigating bandwidth limitations and discuss the relative merits and disadvantages of each.
Index Terms:
Memory latency, memory bandwidth, system design, microprocessors
Doug Burger, James R. Goodman, Alain Kägi, "Limited Bandwidth to Affect Processor Design," IEEE Micro, vol. 17, no. 6, pp. 55-62, Nov.-Dec. 1997, doi:10.1109/40.641597
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