Issue No.06 - November/December (1997 vol.17)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.641593
Conventional DRAM architectures have reached their practical upper limit in operating frequency and bus width. Scaling the SDRAM's memory clock from 66MHz to 100MHz operation creates numerous system design issues, but only offers 33% additional peak bandwidth. Direct Rambus(tm) DRAMs (RDRAM(r)) provide 1.6Gigabytes/sec (GB/s) bandwidth from a single DRAM approaching 95% efficiency when subjected to typical multimedia PC main memory workloads. Using a 16-bit data field and a separate 8-bit address and control field, the Direct RDRAM has independent control and scheduling of all row and column resources as well as I/O data. Based on conventional printed circuit board (PCB) and connector technology, Direct RDRAM modules fit seamlessly into the existing mechanical space and airflow environment of the industry standard PC chassis while providing 3x the memory bandwidth of the industry-standard 66MHz SDRAM subsystem. Direct RDRAMs have both high speed and low power operating modes serving the needs of both line-operated and portable products.
Memory architecture, memory bandwidth, RDRAMs, system design, PC subsystems
Richard Crisp, "Direct Rambus Technology: The New Main Memory Standard", IEEE Micro, vol.17, no. 6, pp. 18-28, November/December 1997, doi:10.1109/40.641593