Issue No.04 - July/August (1997 vol.17)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.612225
In embedded system design, the designer has to find a tradeoff solution for system architecture to satisfy conflicting requirements of the product. Tuning such a system and, in particular, its cache memory, is a complex and difficult task. For these reasons, the designers need simulators to investigate how to improve performance, reduce power consumption and so on. These tools, in the past used only by companies involved in microprocessor design, are now very useful in the design of embedded products. We show the usefulness of our tool in configuring the memory subsystem for two typical programs for embedded systems.
embedded systems, performance evaluation, trace-driven simulation, cache memory, ARM
Cosimo Antonio Prete, Marco Graziano, Francesco Lazzarini, "The ChARM Tool for Tuning Embedded Systems", IEEE Micro, vol.17, no. 4, pp. 67-76, July/August 1997, doi:10.1109/40.612225