|
| This Article | ||
| ||
| Share | ||
| Bibliographic References | ||
| Add to: | ||
| | ||
| Search | ||
| ||
| ASCII Text | x | ||
| David Flynn, "AMBA: Enabling Reusable On-Chip Designs," IEEE Micro, vol. 17, no. 4, pp. 20-27, July/August, 1997. | |||
| BibTex | x | ||
| @article{ 10.1109/40.612211, author = {David Flynn}, title = {AMBA: Enabling Reusable On-Chip Designs}, journal ={IEEE Micro}, volume = {17}, number = {4}, issn = {0272-1732}, year = {1997}, pages = {20-27}, doi = {http://doi.ieeecomputersociety.org/10.1109/40.612211}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - AMBA: Enabling Reusable On-Chip Designs IS - 4 SN - 0272-1732 SP20 EP27 EPD - 20-27 A1 - David Flynn, PY - 1997 KW - Microcontroller buses KW - AMBA bus KW - embedded systems KW - ARM architecture KW - intellectual property VL - 17 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.612211
Advanced RISC Machines Limited designs and licenses Intellectual Property in the form of low-power, small die-area, microprocessor macro-cells and peripherals. These components are combined into a wide range of embedded control integrated circuits, and it is important to ARM's business to make the job of designing a particular controller as simple as possible. AMBA, ARM's Advanced Micro-controller Bus Architecture is the result of five years of development of embedded controller and Application Specific Standard Parts (ASSPs). AMBA defines both a bus specification and a technology independent methodology for designing, implementing and testing customized high-integration embedded controllers. The bus interface is rationalized to ensure right-first-time designs and improve product migration to next-generation cached microprocessors and multiprocessor designs. A further benefit of a well-defined on-chip bus specification is to facilitate the design and exchange of components between ARM Semiconductor licensees and peripheral developers. This paper outlines the issues facing designers when integrating RISC cores into integrated circuits, describes the rationale and specific bus protocols developed for such embedded processor applications and introduces novel approaches to macro-cell test and bus partitioning for power minimization. Finally future plans are introduced for extending the bus for products integrating on-chip DRAM and higher-bandwidth external memory.
Index Terms:
Microcontroller buses, AMBA bus, embedded systems, ARM architecture, intellectual property
Citation:
David Flynn, "AMBA: Enabling Reusable On-Chip Designs," IEEE Micro, vol. 17, no. 4, pp. 20-27, July-Aug. 1997, doi:10.1109/40.612211
Usage of this product signifies your acceptance of the Terms of Use.

