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Spider: A High-Speed Network Interconnect
January/February 1997 (vol. 17 no. 1)
pp. 34-39
The SGI SPIDER chip provides a high-speed, reliable switching network with a flexible interface and topology suitable for a variety of high-end applications. Six full-duplex ports and a nonblocking internal crossbar can sustain a data transfer rate of 4.8 Gbytes/sec, either between chips in a single chassis or between remote chassis over cables up to 5 meters long. Messages of arbitrary length travel over four independent virtual channels with 256 levels of priority, and are protected by CCITT-CRC with hardware retry. These features make the SGI SPIDER well suited to serve as an interprocessor communication fabric, a distributed graphics switch fabric, or a central switch for high-end networking applications.
Index Terms:
Switching networks, interconnects, interprocessor communication, SGI Spider chip
Citation:
Mike Galles, "Spider: A High-Speed Network Interconnect," IEEE Micro, vol. 17, no. 1, pp. 34-39, Jan.-Feb. 1997, doi:10.1109/40.566196
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