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Rule-Driven VLSI Fuzzy Processor
June 1996 (vol. 16 no. 3)
pp. 62-74
In this article the authors propose the design of an architecture for a general-purpose fuzzy processor whose main features are: pre-processing of inferences to reduce the number of rules to be processed and increase the processing speed; pipeling of the various inference execution stage; parallel computation of the degree of activation of the antecedents of a single rule; mixed technology design, as the Kernel of the processor is entirely made up of fuzzy-gates based on a discrete-analog approach.
Index Terms:
Fuzzy Logic, Fuzzy Gates, Mixed technology, Pipelining, VLSI Design.
Citation:
Giuseppe Ascia, Vincenzo Catania, Marco Russo, Lorenzo Vita, "Rule-Driven VLSI Fuzzy Processor," IEEE Micro, vol. 16, no. 3, pp. 62-74, June 1996, doi:10.1109/MM.1996.10009
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