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| Richard B. Gillett, "Memory Channel Network for PCI," IEEE Micro, vol. 16, no. 1, pp. 12-18, February, 1996. | |||
| BibTex | x | ||
| @article{ 10.1109/40.482307, author = {Richard B. Gillett}, title = {Memory Channel Network for PCI}, journal ={IEEE Micro}, volume = {16}, number = {1}, issn = {0272-1732}, year = {1996}, pages = {12-18}, doi = {http://doi.ieeecomputersociety.org/10.1109/40.482307}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, } | |||
| RefWorks Procite/RefMan/Endnote | x | ||
| TY - MGZN JO - IEEE Micro TI - Memory Channel Network for PCI IS - 1 SN - 0272-1732 SP12 EP18 EPD - 12-18 A1 - Richard B. Gillett, PY - 1996 KW - parallel computers KW - networks KW - interconnects KW - Memory Channel VL - 16 JA - IEEE Micro ER - | |||
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.482307
A Cluster is a parallel computing system constructed by interconnecting standard computers. The parallel performance of a cluster is often limited by performance compromises in conventional high-performance networks. This article discusses the benefits of a more specialized networking approach and the resulting design of a low-cost, high-performance interconnect optimized specifically to enhance both the parallel performance and high-availability aspects of a cluster. This interconnect, Memory Channel for PCI, attaches to the industry-standard PCI bus found in most computers. The first-generation product, running on a standard Digital UNIX Cluster, can provide cluster communication latency and overhead improvements of 100 and 1000 times respectively compared to conventional networks.
Index Terms:
parallel computers, networks, interconnects, Memory Channel
Citation:
Richard B. Gillett, "Memory Channel Network for PCI," IEEE Micro, vol. 16, no. 1, pp. 12-18, Feb. 1996, doi:10.1109/40.482307
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