Issue No.06 - December (1995 vol.15)
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/40.476256
Various kinds of new advanced architectures have been proposed in DRAM interfaces to close the performance gap between DRAMs and MPUs and to break the bandwidth bottleneck of graphic systems. This article gives an overview to some of these new interfaces including EDO, SDRAM, RDRAM, CDRAM, and 3D RAM. The EDO will soon replace conventional DRAM because it requires minimal changes in existing interfaces. The SDRAM will partly take over it in 66 MHz and higher frequency systems with its standardized synchronous interface. Other new interfaces will initially find some target markets where they can take advantage of their unique features, and then they will seek wider market acceptance. The article also briefly discusses a future trend toward "a system on a chip".
DRAM, interfaces, high-speed DRAM, main memory, graphics memory, performance gap, bandwidth bottleneck
Masaki Kumanoya, Toshiyuki Ogawa, Kazunari Inoue, "Advances in DRAM Interfaces", IEEE Micro, vol.15, no. 6, pp. 30-36, December 1995, doi:10.1109/40.476256