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An Analog Processor Architecture for a Neural Network Classifier
June 1994 (vol. 14 no. 3)
pp. 16-28

Many neural-like algorithms currently under study support classification tasks. Several of these algorithms base their functionality on LVQ-like procedures to find locations of centroids in the data space, and on kernel (or radial-basis) functions centered on these centroids to approximate functions or probability densities. A generic analog chip could implement in a parallel way all basic functions found in these algorithms, permitting construction of a fast, portable classification system.

Citation:
Michel Verleysen, Philippe Thissen, Jean-Luc Voz, Jordi Madrenas, "An Analog Processor Architecture for a Neural Network Classifier," IEEE Micro, vol. 14, no. 3, pp. 16-28, June 1994, doi:10.1109/40.285221
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