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Reconfiguring Fault-Tolerant Two-Dimensional Array Architectures
April 1994 (vol. 14 no. 2)
pp. 60-69

Circuit complexities reduce overall reliability and mean-time-between-failure rates of today's very large processing arrays. Our integrated, three-level hierarchy of reconfiguration methods provides reasonable levels of fault tolerance for such systems. Operating in a completely distributed fashion, the hierarchy does not require that any components be fault free. It significantly improves array reliability by using a combination of transient fault rollback techniques and local and global reconfiguration algorithms.

Citation:
Nathaniel J. Davis, IV, Gail Gray, Joseph A. Wegner, Shannon E. Lawson, Vinay Murthy, Tennis S. White, "Reconfiguring Fault-Tolerant Two-Dimensional Array Architectures," IEEE Micro, vol. 14, no. 2, pp. 60-69, April 1994, doi:10.1109/40.272839
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