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Designing, Packaging, and Testing a 300-MHz, 115 W ECL Microprocessor
April 1994 (vol. 14 no. 2)
pp. 50-58
ASCII Text
x 
 
Norman P. Jouppi, Patrick Boyle, John S. Fitch, "Designing, Packaging, and Testing a 300-MHz, 115 W ECL Microprocessor," IEEE Micro, vol. 14, no. 2, pp. 50-58, April, 1994.
 
 
BibTex
x
 
@article{ 10.1109/40.272837,
author = {Norman P. Jouppi and Patrick Boyle and John S. Fitch},
title = {Designing, Packaging, and Testing a 300-MHz, 115 W ECL Microprocessor},
journal ={IEEE Micro},
volume = {14},
number = {2},
issn = {0272-1732},
year = {1994},
pages = {50-58},
doi = {http://doi.ieeecomputersociety.org/10.1109/40.272837},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
x 
 
TY - MGZN
JO - IEEE Micro
TI - Designing, Packaging, and Testing a 300-MHz, 115 W ECL Microprocessor
IS - 2
SN - 0272-1732
SP50
EP58
EPD - 50-58
A1 - Norman P. Jouppi,
A1 - Patrick Boyle,
A1 - John S. Fitch,
PY - 1994
VL - 14
JA - IEEE Micro
ER -
 

A custom microprocessor implemented with 1-/spl mu/m bipolar technology operates at 300 MHz and dissipates 115 W. By using full-custom ECL technology, we achieved clock rates three to six times faster than 1-/spl mu/m CMOS processors. We designed this research prototype to develop VLSI ECL circuit techniques, a new style of CAD tools, high-performance chip interfaces, and advanced packaging techniques for high-power microprocessors.

Citation:
Norman P. Jouppi, Patrick Boyle, John S. Fitch, "Designing, Packaging, and Testing a 300-MHz, 115 W ECL Microprocessor," IEEE Micro, vol. 14, no. 2, pp. 50-58, April 1994, doi:10.1109/40.272837
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